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Title:
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A 3D deep n-well CMOS MAPS for the ILC vertex detector
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Permalink:
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http://hdl.handle.net/10446/24191
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| Suggested citation: | GAIONI, LUIGI, MANGHISONI, MASSIMO, RATTI, LODOVICO, RE, VALERIO, TRAVERSI, GIANLUCA, (2010). A 3D deep n-well CMOS MAPS for the ILC vertex detector. Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment (n. 1-3, vol. 617), 324- 326. Retrieved from http://hdl.handle.net/10446/24191 |
| Author⁄s: | GAIONI, LUIGI
MANGHISONI, MASSIMO
RATTI, LODOVICO
RE, VALERIO
TRAVERSI, GIANLUCA |
| Type of content: | journal article - articolo |
| Language: | eng |
| Date issued: | 2010 |
| Is part of: | Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment |
| Issue: | n. 1-3, vol. 617 |
| From p. : | 324 |
| to p. : | 326 |
| Keywords (Italian): | CMOS;sensors;microelectronics;3D integration |
| Abstract: | This work presents the features of a new kind of deep n-well monolithic active pixel sensor
(DNW-MAPS), called SDR1 (Sparsified Data Readout), which exploits the capabilities of vertical integration (3D) processing in view of the design of a high granularity detector for vertexing
applications at the International Linear Collider (ILC).
SDR1 inherits and extends the functional capabilities of DNW-MAPS fabricated in planar (2D) CMOS technology and is expected to show better collection efficiency with respect to 2D versions. The aim of the paper is to outline the features of analog and digital architecture of the SDR1 chip, together with circuit simulations data. Also some device simulation results concerning detection efficiency will be discussed. |
| In: | Journal contributions - Contributi su rivista scientifica
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