| Nome |
# |
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A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0, file e40f7b84-2549-afca-e053-6605fe0aeaf2
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664
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A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC, file e40f7b86-1ac0-afca-e053-6605fe0aeaf2
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378
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Description and performance of track and primary-vertex reconstruction with the CMS tracker, file e40f7b86-34ce-afca-e053-6605fe0aeaf2
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331
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Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC, file e40f7b85-cb54-afca-e053-6605fe0aeaf2
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327
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65 nm Technology for HEP: Status and Perspective, file e40f7b86-12a7-afca-e053-6605fe0aeaf2
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317
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Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC, file e40f7b88-4e33-afca-e053-6605fe0aeaf2
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218
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Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications, file e40f7b88-4e37-afca-e053-6605fe0aeaf2
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210
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P-Type Silicon Strip Sensors for the new CMS Tracker at HL-LHC, file e40f7b87-31a2-afca-e053-6605fe0aeaf2
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209
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The SuperB Silicon Vertex Tracker, file e40f7b88-5843-afca-e053-6605fe0aeaf2
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187
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Transmission lines implementation on HDI flex circuits for the CMS tracker upgrade, file e40f7b85-cbbd-afca-e053-6605fe0aeaf2
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186
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Test beam demonstration of silicon microstrip modules with transverse momentum discrimination for the future CMS tracking detector, file e40f7b88-16dd-afca-e053-6605fe0aeaf2
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182
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Precision measurement of the structure of the CMS inner tracking system using nuclear interactions, file e40f7b88-2b52-afca-e053-6605fe0aeaf2
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177
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The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities, file e40f7b85-22ce-afca-e053-6605fe0aeaf2
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170
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Classification of Essential Tremor and Parkinson’s Tremor Based on a Low-Power Wearable Device, file e40f7b89-83d2-afca-e053-6605fe0aeaf2
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149
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Perspectives of 65nm CMOS technologies for high performance front-end electronics, file e40f7b88-9be6-afca-e053-6605fe0aeaf2
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142
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Beam test performance of prototype silicon detectors for the Outer Tracker for the Phase-2 Upgrade of CMS, file e40f7b89-8f6b-afca-e053-6605fe0aeaf2
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138
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Signal and Noise Performance of a 110-nm CMOS Technology for Photon Science Applications, file e40f7b8a-3982-afca-e053-6605fe0aeaf2
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128
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Experimental study of different silicon sensor options for the upgrade of the CMS Outer Tracker, file e40f7b89-8f66-afca-e053-6605fe0aeaf2
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118
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RD53 analog front-end processors for the ATLAS and CMS experiments at the high-luminosity LHC, file e40f7b89-7c07-afca-e053-6605fe0aeaf2
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112
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Design and test of current-mode DACs for threshold tuning of front-end channels for the High Luminosity LHC, file e40f7b89-4c4b-afca-e053-6605fe0aeaf2
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110
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Alignment of the CMS tracker with LHC and cosmic ray data, file e40f7b86-32df-afca-e053-6605fe0aeaf2
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102
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Winter: A Novel Low Power Modular Platform for Wearable and IoT Applications, file e40f7b8a-d498-afca-e053-6605fe0aeaf2
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100
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The DAQ and control system for the CMS Phase-1 pixel detector upgrade, file e40f7b89-c722-afca-e053-6605fe0aeaf2
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99
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A Prototype of a new generation readout ASIC in 65 nm CMOS for pixel detectors at HL-LHC, file e40f7b89-dae7-afca-e053-6605fe0aeaf2
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97
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Precision measurement of the structure of the CMS inner tracking system using nuclear interactions, file e40f7b87-fb1e-afca-e053-6605fe0aeaf2
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95
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0.13μm CMOS technologies for analog front-end circuits in LHC detector upgrades, file e40f7b86-32af-afca-e053-6605fe0aeaf2
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92
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Characterisation of irradiated thin silicon sensors for the CMS phase II pixel upgrade, file e40f7b87-5213-afca-e053-6605fe0aeaf2
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92
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PixFEL: Development of an X-ray diffraction imager for future FEL applications, file e40f7b89-c133-afca-e053-6605fe0aeaf2
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88
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Algorithms for Threshold Dispersion Minimization of the CHIPIX65 Asynchronous Front-End, file e40f7b89-eadd-afca-e053-6605fe0aeaf2
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82
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Stabilization and Protection of the Shunt-LDO regulator for the HL-LHC pixel detector upgrades, file e40f7b89-9a63-afca-e053-6605fe0aeaf2
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78
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Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels, file e40f7b8a-293e-afca-e053-6605fe0aeaf2
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77
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RD53A: A large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades, file e40f7b89-c715-afca-e053-6605fe0aeaf2
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76
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Design of analog front-ends for the RD53 demonstrator chip, file e40f7b89-f9b5-afca-e053-6605fe0aeaf2
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75
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Trapping in proton irradiated p+-n-n+ silicon sensors at fluences anticipated at the HL-LHC outer tracker, file e40f7b89-daec-afca-e053-6605fe0aeaf2
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71
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A Charge Sensitive Amplifier in a 28 nm CMOS Technology for Pixel Detectors at Future Particle Colliders, file 7eb6142c-57ef-428b-9654-06cc4ba1b929
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68
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Comparative evaluation of analogue front-end designs for the CMS Inner Tracker at the High Luminosity LHC, file e40f7b8a-eda3-afca-e053-6605fe0aeaf2
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66
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The CMS Phase-1 pixel detector upgrade, file e40f7b8a-c5ce-afca-e053-6605fe0aeaf2
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64
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Selection of the silicon sensor thickness for the Phase-2 upgrade of the CMS Outer Tracker, file e40f7b8a-d85e-afca-e053-6605fe0aeaf2
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62
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65 nm CMOS analog front-end for pixel detectors at the HL-LHC, file e40f7b8a-1e0a-afca-e053-6605fe0aeaf2
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59
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A Front-End Channel in 65 nm CMOS for Pixel Detectors at the HL-LHC Experiment Upgrades, file e40f7b8a-48e9-afca-e053-6605fe0aeaf2
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50
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Characterization and verification of the Shunt-LDO regulator and its protection circuits for serial powering of the ATLAS and CMS pixel detectors, file 47b84c17-ab6a-4112-af03-fd9c6a80023e
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45
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Strategies and performance of the CMS silicon tracker alignment during LHC Run 2, file 2c9be3b1-ac9d-4a67-a792-d9a2c4ef825d
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31
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Beam test performance of a prototype module with Short Strip ASICs for the CMS HL-LHC tracker upgrade, file 687628a9-fb9c-4bf6-9609-b656b14e8d54
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31
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Development and Testing of a Miniaturized Platform for Photoplethysmography, file f5eac1b1-621d-4cb4-bded-317a4531791e
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31
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Test beam performance of a CBC3-based mini-module for the Phase-2 CMS Outer Tracker before and after neutron irradiation, file 661713e6-4061-4cd9-a5d6-5dc6bdfc0990
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26
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Test results and prospects for RD53A, a large scale 65 nm CMOS chip for pixel readout at the HL-LHC, file e40f7b89-3972-afca-e053-6605fe0aeaf2
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9
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65-nm CMOS Front-End Channel for Pixel Readout in the HL-LHC Radiation Environment, file e40f7b87-4b64-afca-e053-6605fe0aeaf2
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8
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Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC, file e40f7b89-318a-afca-e053-6605fe0aeaf2
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8
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Optimization of the 65-nm CMOS Linear Front-End Circuit for the CMS Pixel Readout at the HL-LHC, file e40f7b8a-ea66-afca-e053-6605fe0aeaf2
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8
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Design of bandgap reference circuits in a 65 nm CMOS technology for HL-LHC applications, file e40f7b84-50e4-afca-e053-6605fe0aeaf2
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7
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Characterization of bandgap reference circuits designed for high energy physics applications, file e40f7b85-c4ef-afca-e053-6605fe0aeaf2
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7
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A Front-End Channel in 65 nm CMOS for Pixel Detectors at the HL-LHC Experiment Upgrades, file e40f7b86-186d-afca-e053-6605fe0aeaf2
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7
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Front-end performance and charge collection properties of heavily irradiated DNW MAPS, file e40f7b86-6366-afca-e053-6605fe0aeaf2
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7
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Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels, file e40f7b87-6aea-afca-e053-6605fe0aeaf2
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7
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Heavily irradiated 65-nm readout chip with asynchronous channels for future pixel detectors, file e40f7b88-43ee-afca-e053-6605fe0aeaf2
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7
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Design of low-power, low-voltage, differential I/O links for High Energy Physics applications, file e40f7b84-4f66-afca-e053-6605fe0aeaf2
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6
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First test results of the CHIPIX65 asynchronous front-end connected to a 3D sensor, file e40f7b88-b379-afca-e053-6605fe0aeaf2
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6
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A Rad-Hard Bandgap Voltage Reference for High Energy Physics Experiments, file e40f7b89-9828-afca-e053-6605fe0aeaf2
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6
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28 nm CMOS analog front-end channels for future pixel detectors, file e998c4fc-8175-4d99-8b75-f6eb3ba7fcc1
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6
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Assessment of a low-power 65 nm CMOS technology for analog front-end design, file e40f7b84-3f10-afca-e053-6605fe0aeaf2
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5
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Low-power clock distribution circuits for the Macro Pixel ASIC, file e40f7b84-4123-afca-e053-6605fe0aeaf2
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5
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Macro Pixel ASIC (MPA): the readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC, file e40f7b84-4ebc-afca-e053-6605fe0aeaf2
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5
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CMOS Monolithic Sensors with Hybrid Pixel-Like, Time-Invariant Front-End Electronics : TID Effects and Bulk Damage Study, file e40f7b85-1336-afca-e053-6605fe0aeaf2
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5
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A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC, file e40f7b85-c481-afca-e053-6605fe0aeaf2
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5
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Charge preamplifier in a 65 nm CMOS technology for pixel readout in the Grad TID regime, file e40f7b87-aeb9-afca-e053-6605fe0aeaf2
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5
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CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments, file e40f7b85-0d7e-afca-e053-6605fe0aeaf2
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4
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PixFEL: developing a fine pitch, fast 2D X-ray imager for the next generation X-FELs, file e40f7b85-147e-afca-e053-6605fe0aeaf2
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4
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First experimental results on active and slim-edge silicon sensors for XFEL, file e40f7b85-dfe4-afca-e053-6605fe0aeaf2
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4
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Design and TCAD simulations of planar active-edge pixel sensors for future XFEL applications, file e40f7b85-e527-afca-e053-6605fe0aeaf2
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4
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Test results of the CHIPIX65 asynchronous front-end for the HL-LHC experiment upgrades, file e40f7b88-11ec-afca-e053-6605fe0aeaf2
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4
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The PixFEL front-end for X-ray imaging in the radiation environment of next generation FELs, file e40f7b88-29b4-afca-e053-6605fe0aeaf2
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4
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Development of an In-Ear Photoplethysmography Wearable System, file e40f7b89-5740-afca-e053-6605fe0aeaf2
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4
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28 nm front-end channels for the readout of pixel sensors in future high-rate applications, file 7e3789b4-faca-41d5-96bf-0d3f29939d82
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3
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Active pixel sensors with enhanced pixel-level analog and digital functionalities in a 2-tier 3D CMOS technology, file e40f7b84-2242-afca-e053-6605fe0aeaf2
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3
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CMOS MAPS in a homogeneous 3D process for charged particle tracking, file e40f7b84-3f14-afca-e053-6605fe0aeaf2
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3
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65 nm CMOS analog front-end for pixel detectors at the HL-LHC, file e40f7b85-8a3f-afca-e053-6605fe0aeaf2
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3
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A 65 nm Rad-Hard Bandgap Voltage Reference for LHC Environment, file e40f7b85-cb04-afca-e053-6605fe0aeaf2
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3
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An asynchronous front-end channel for pixel detectors at the HL-LHC experiment upgrades, file e40f7b85-d04d-afca-e053-6605fe0aeaf2
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3
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Design and TCAD simulation of planar p-on-n active-edge pixel sensors for the next generation of FELs, file e40f7b85-d3f0-afca-e053-6605fe0aeaf2
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3
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Noise Characterization of 130 nm and 90 nm CMOS Technologies for Analog Front-end Electronics, file e40f7b86-2eb4-afca-e053-6605fe0aeaf2
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3
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Design of LVDS driver and receiver in 28 nm CMOS technology for Associative Memories, file e40f7b87-2df2-afca-e053-6605fe0aeaf2
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3
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A pixelated x-ray detector for diffraction imaging at next-generation high-rate FEL sources, file e40f7b87-7042-afca-e053-6605fe0aeaf2
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3
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Recent developments in 130 nm CMOS monolithic active pixel detectors, file e40f7b87-7232-afca-e053-6605fe0aeaf2
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3
|
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Thin pixel development for the Layer0 of the SuperB silicon vertex tracker, file e40f7b87-9f36-afca-e053-6605fe0aeaf2
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3
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|
Development of deep N-well MAPS in a 130 nm CMOS technology and beam test results on a 4k-Pixel matrix with digital sparsified readout, file e40f7b87-bd06-afca-e053-6605fe0aeaf2
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3
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The associative memory for the self-triggered SLIM5 silicon telescope, file e40f7b87-c061-afca-e053-6605fe0aeaf2
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3
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CMOS monolithic sensors in a homogeneous 3D process for low energy particle imaging, file e40f7b87-c5e0-afca-e053-6605fe0aeaf2
|
3
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|
Proposal of a data sparsification unit for a mixed-mode MAPS detector, file e40f7b87-cdf7-afca-e053-6605fe0aeaf2
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3
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TID effects in deep N-well CMOS monolithic active pixel sensors, file e40f7b87-f5ac-afca-e053-6605fe0aeaf2
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3
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Development of a telemedicine-oriented gait analysis system based on inertial sensors, file e40f7b88-50d2-afca-e053-6605fe0aeaf2
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3
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A novel wearable sensor system for multi-lead ECG measurement, file e40f7b88-c295-afca-e053-6605fe0aeaf2
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3
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Development of a Wearable In-Ear PPG System for Continuous Monitoring, file e40f7b89-376d-afca-e053-6605fe0aeaf2
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3
|
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Threshold tuning DACs for pixel readout chips at the High Luminosity LHC, file e40f7b89-4246-afca-e053-6605fe0aeaf2
|
3
|
|
A Pixel Read-Out Front-End in 28 nm CMOS with Time and Space Resolution, file e40f7b89-573e-afca-e053-6605fe0aeaf2
|
3
|
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Analog IP blocks in 28 nm CMOS for the high energy physics community: SLVS transmitter and receiver, file 37e27faf-1e68-4c63-a76e-4fdde472bd4d
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2
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From 65 nm to 28 nm CMOS: design of analog building blocks of frontend channels for pixel sensors in high-energy physics experiments, file 4224603d-0cd9-4796-8804-df00fa3916a2
|
2
|
|
The design of fast analog channels for the readout of strip detectors in the inner layers of the SuperB SVT, file e40f7b84-1c98-afca-e053-6605fe0aeaf2
|
2
|
|
Monolithic pixel sensors for fast silicon vertex trackers in a quadruple well CMOS technology, file e40f7b84-1c9f-afca-e053-6605fe0aeaf2
|
2
|
|
Characterization of a large scale DNW MAPS fabricated in a 3D integration process, file e40f7b84-3ae5-afca-e053-6605fe0aeaf2
|
2
|
|
Effects of substrate thinning on the properties of quadruple well CMOS MAPS, file e40f7b84-3f0c-afca-e053-6605fe0aeaf2
|
2
|
| Totale |
6.445 |