TRAVERSI, Gianluca
 Distribuzione geografica
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Continente #
EU - Europa 40.745
NA - Nord America 15.755
AS - Asia 4.569
Continente sconosciuto - Info sul continente non disponibili 24
AF - Africa 22
SA - Sud America 18
OC - Oceania 14
Totale 61.147
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Nazione #
GB - Regno Unito 18.640
US - Stati Uniti d'America 14.795
IE - Irlanda 7.765
CN - Cina 3.024
IT - Italia 2.923
PL - Polonia 2.692
RU - Federazione Russa 2.520
DE - Germania 2.018
FR - Francia 1.456
SE - Svezia 1.293
CA - Canada 953
UA - Ucraina 572
SG - Singapore 553
VN - Vietnam 472
AT - Austria 275
FI - Finlandia 182
EU - Europa 155
KR - Corea 151
IN - India 131
NL - Olanda 129
TR - Turchia 96
BE - Belgio 61
CH - Svizzera 47
ID - Indonesia 46
CZ - Repubblica Ceca 37
ES - Italia 37
LT - Lituania 32
HK - Hong Kong 18
JP - Giappone 17
BG - Bulgaria 16
IR - Iran 12
AU - Australia 11
RO - Romania 11
BR - Brasile 10
GR - Grecia 8
PT - Portogallo 8
SC - Seychelles 7
BD - Bangladesh 6
DK - Danimarca 6
LV - Lettonia 6
TW - Taiwan 6
LB - Libano 5
DZ - Algeria 4
IL - Israele 4
PA - Panama 4
BJ - Benin 3
MD - Moldavia 3
MN - Mongolia 3
MY - Malesia 3
NZ - Nuova Zelanda 3
PE - Perù 3
A2 - ???statistics.table.value.countryCode.A2??? 2
BY - Bielorussia 2
CY - Cipro 2
HR - Croazia 2
IQ - Iraq 2
KG - Kirghizistan 2
KZ - Kazakistan 2
LA - Repubblica Popolare Democratica del Laos 2
MU - Mauritius 2
MX - Messico 2
MZ - Mozambico 2
PH - Filippine 2
TH - Thailandia 2
UZ - Uzbekistan 2
VE - Venezuela 2
A1 - Anonimo 1
AE - Emirati Arabi Uniti 1
AM - Armenia 1
AR - Argentina 1
AZ - Azerbaigian 1
CL - Cile 1
EC - Ecuador 1
ET - Etiopia 1
GN - Guinea 1
GT - Guatemala 1
HU - Ungheria 1
IS - Islanda 1
LK - Sri Lanka 1
LU - Lussemburgo 1
MA - Marocco 1
NG - Nigeria 1
NO - Norvegia 1
PK - Pakistan 1
SY - Repubblica araba siriana 1
Totale 61.281
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Città #
Southend 17.591
Dublin 7.717
Warsaw 2.689
Jacksonville 1.791
Chandler 1.158
Ann Arbor 787
Princeton 674
Nanjing 643
Wilmington 590
Ashburn 551
Mountain View 549
Woodbridge 542
Dearborn 515
Montréal 510
Munich 472
Dong Ket 466
Fairfield 460
Toronto 419
Boardman 408
Dalmine 386
Beijing 364
Mcallen 362
Singapore 319
Houston 305
Bergamo 289
Milan 276
Vienna 262
Nanchang 247
Shanghai 243
Sunnyvale 239
Altamura 237
Atlanta 235
San Mateo 221
Andover 214
Rancio Valcuvia 211
Washington 206
Seattle 197
Cambridge 170
Zhengzhou 151
Moscow 144
Redwood City 122
Kunming 110
London 102
Tianjin 98
Ogden 97
Shenyang 88
Kiez 86
Hebei 83
New York 77
Fremont 62
Guangzhou 60
Pavia 60
Brussels 59
Jiaxing 59
Nürnberg 56
Hangzhou 52
Needham Heights 51
Amsterdam 47
Jakarta 46
Los Angeles 43
Norwalk 42
Kocaeli 40
Jinan 39
Changsha 37
Santa Clara 36
Saint Petersburg 35
Changchun 34
Frankfurt am Main 34
Sakarya 33
Hamburg 32
Lanzhou 29
San Diego 29
Verdellino 29
Helsinki 28
Chicago 27
Brno 26
Rome 26
Westminster 25
Pisa 24
Segrate 24
Ningbo 23
Auburn Hills 21
Hefei 21
Hounslow 21
Madrid 21
Vilnius 21
Seoul 19
Istanbul 18
Kilburn 18
Ottawa 18
St Petersburg 18
Acton 17
Serra 17
Shenzhen 17
Duelmen 16
Lappeenranta 15
Ratingen 15
San Giuliano Milanese 15
Wuhan 15
Bologna 14
Totale 46.257
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Nome #
PixFEL: Enabling technologies, building blocks and architectures for advanced X-ray pixel cameras at the next generation FELs 2.019
0.13μm CMOS technologies for analog front-end circuits in LHC detector upgrades 837
A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0 748
130 nm and 90 nm CMOS Technologies for Detector Front-end Applications 706
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC 631
65 nm Technology for HEP: Status and Perspective 611
A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC 554
The SuperB Silicon Vertex Tracker 498
P-Type Silicon Strip Sensors for the new CMS Tracker at HL-LHC 497
A 65 nm CMOS Front-End Chip for High Density Readout of Pixel Sensors 476
Transmission lines implementation on HDI flex circuits for the CMS tracker upgrade 468
A 10 bit resolution readout channel with dynamic range compression for X-ray imaging at FELs 465
Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC 462
3D DNW MAPS for High Resolution, Highly Efficient, Sparse Readout CMOS Detectors 436
2D and 3D CMOS MAPS with high performance pixel-level signal processing 425
Alignment of the CMS tracker with LHC and cosmic ray data 424
Perspectives of 65nm CMOS technologies for high performance front-end electronics 420
Precision measurement of the structure of the CMS inner tracking system using nuclear interactions 416
Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications 410
Test beam demonstration of silicon microstrip modules with transverse momentum discrimination for the future CMS tracking detector 409
A 3D deep n-well CMOS MAPS for the ILC vertex detector 404
Characterisation of irradiated thin silicon sensors for the CMS phase II pixel upgrade 395
Monolithic pixel detectors in a 0.13 µm CMOS technology with sensor level continuous time charge amplification and shaping 392
Beam test results for the SuperB-SVT thin striplet detector 382
Vertical integration approach to the readout of pixel detectors for vertexing applications 381
Description and performance of track and primary-vertex reconstruction with the CMS tracker 376
A 65-nm CMOS Prototype Chip With Monolithic Pixel Sensors and Fast Front-End Electronics 373
The front-end chip of the SuperB SVT detector 369
Vertically integrated deep N-well CMOS MAPS with sparsification and time stamping capabilities for thin charged particle trackers 364
Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker 362
The SuperB silicon vertex tracker 355
Impact of lateral isolation oxides on radiation-induced noise degradation in CMOS technologies in the 100-nm regime 354
2D and 3D thin pixel technologies for the Layer0 of the SuperB Silicon Vertex Tracker 348
Noise performance of 0.13 µm CMOS technologies for detector front-end applications 348
A new approach to the design of monolithic active pixel detectors in 0.13 µm triple well CMOS technology 346
Design of bandgap reference circuits in a 65 nm CMOS technology for HL-LHC applications 343
Thin pixel development for the superB silicon vertex tracker 342
Mechanisms of Noise Degradation in Low Power 65 nm CMOS Transistors Exposed to Ionizing Radiation 334
Radiation tolerance of devices and circuits in a 3D technology based on the vertical integration of two 130-nm CMOS layers 327
Comprehensive study of total ionizing dose damage mechanisms and their effects on noise sources in a 90 nm CMOS technology 326
The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities 325
Monolithic Active Pixel Sensors for the vertex detector at the International Linear Collider 325
Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier 323
Fast Analog Front-end for the Readout of the SuperB SVT Inner Layers 321
Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging 320
Total ionizing dose effects on the noise performances of a 0.13 /spl mu/m CMOS technology 319
The Apsel65 front-end chip for the readout of pixel sensors in the 65 nm CMOS node 317
Survey of noise performances and scaling effects in deep submicrometer CMOS devices from different foundries 315
First results from the characterization of a three-dimensional deep N-well MAPS prototype for vertexing applications 313
Assessment of a low-power 65 nm CMOS technology for analog front-end design 310
Gamma-ray response of SOI bipolar junction transistors for fast, radiation tolerant front-end electronics 310
Monolithic Pixel Sensors for Fast Particle Trackers in a Quadruple Well CMOS Technology 310
Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0 309
Front-end performance and charge collection properties of heavily irradiated DNW MAPS 309
CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments 308
A novel monolithic active pixel detector in a 0.13 µm triple well CMOS technology with pixel level analog processing 307
Response of SOI bipolar transistors exposed to gamma-rays under different dose rate and bias conditions 307
Noise behavior of a 180 nm CMOS SOI technology for detector front-end electronics 306
Investigating degradation mechanisms in 130nm and 90nm commercial CMOS technologies exposed to up to 100 Mrad ionizing radiation dose 306
Recent results from the development of silicon detectors with integrated electronics 304
Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors 301
A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion 301
A 65 nm Rad-Hard Bandgap Voltage Reference for LHC Environment 301
Charge signal processors in a 130 nm CMOS technology for the sparse readout of small pitch monolithic and hybrid pixel sensors 299
Monolithic pixel sensors for fast silicon vertex trackers in a quadruple well CMOS technology 299
Review of radiation effects leading to noise performance degradation in 100-nm scale microelectronic technologies 294
Active pixel sensors with enhanced pixel-level analog and digital functionalities in a 2-tier 3D CMOS technology 294
Analog front-end for monolithic and hybrid pixels in a vertical integration CMOS technology 292
TID-Induced Degradation in Static and Noise Behavior of Sub-100 nm Multifinger Bulk NMOSFETs 292
The readout of the LHC beam luminosity monitor: accurate shower energy measurements at a 40 MHz repetition rate 291
Design criteria for low noise front-end electronics in the 0.13 µm CMOS generation 290
CMOS MAPS with fully integrated, hybrid-pixel-like analog front-end electronics 289
MAPS with pixel level sparsified readout: from standard CMOS to vertical integration 289
The design of fast analog channels for the readout of strip detectors in the inner layers of the SuperB SVT 289
Latest results of the R&D on CMOS MAPS for the Layer0 of the SuperB SVT 285
Perspectives for low noise detector readout in a sub-quarter-micron CMOS SOI technology 284
Beam test results of different configurations of deep N-well MAPS matrices featuring in pixel full signal processing 284
Recent progress in the development of 3D deep n-well CMOS MAPS 283
Performance of a DNW CMOS active pixel sensor designed for the ILC Vertex Detector 281
A pixelated x-ray detector for diffraction imaging at next-generation high-rate FEL sources 281
Low-power clock distribution circuits for the Macro Pixel ASIC 280
Pixel-Level Continuous-Time Analog Signal Processing for 130 nm CMOS MAPS 280
Deep N-well CMOS MAPS with in-pixel signal processing and sparsification for the ILC vertex detector 280
CMOS MAPS in a Homogeneous 3D Process for Charged Particle Tracking 280
A 4096-pixel MAPS device with on-chip data sparsification 280
Noise analysis of NPN SOI bipolar transistors for the design of charge measuring systems 279
Design and Performance of Analog Circuits for DNW-MAPS in 100-nm-scale CMOS Technology 279
Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors 277
Proton-induced damage in JFET transistors and charge preamplifiers on high-resistivity silicon 277
Charge Signal Processors in Sparse Readout CMOS MAPS and Hybrid Pixel Sensors for the SuperB Layer0 276
Characterization of bulk damage in CMOS MAPS with Deep N-Well collecting electrode 276
Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker 275
R&D Progress on The SuperB Silicon Vertex Tracker 274
Resolution limits in 130 nm and 90 nm CMOS technologies for analog front-end applications 272
Low noise design issues for analog front-end electronics in 130 nm and 90 nm CMOS technologies 272
Development of a multi-lead ECG wearable sensor system for biomedical applications 270
Minimum noise design of charge amplifiers with CMOS processes in the 100 nm feature size range 268
Beam test performance of prototype silicon detectors for the Outer Tracker for the Phase-2 Upgrade of CMS 268
Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions 267
Recent results and plans of the 3D IC consortium 267
Totale 36.713
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Categoria #
all - tutte 164.724
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 164.724
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/20203.108 0 0 0 0 0 463 712 317 688 275 292 361
2020/202110.006 947 574 549 636 695 856 1.104 320 1.045 1.072 1.361 847
2021/20226.594 560 831 388 441 635 969 300 310 395 724 676 365
2022/20235.255 830 616 789 782 453 635 44 230 392 103 231 150
2023/20249.955 136 259 260 215 340 2.056 5.804 351 178 55 59 242
2024/20252.709 349 587 372 1.118 163 120 0 0 0 0 0 0
Totale 62.731