TRAVERSI, Gianluca
 Distribuzione geografica
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Continente #
EU - Europa 45.408
NA - Nord America 22.606
AS - Asia 10.682
SA - Sud America 811
AF - Africa 403
Continente sconosciuto - Info sul continente non disponibili 28
OC - Oceania 21
Totale 79.959
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Nazione #
US - Stati Uniti d'America 21.414
GB - Regno Unito 18.814
IE - Irlanda 7.771
RU - Federazione Russa 4.810
CN - Cina 4.583
SG - Singapore 3.459
IT - Italia 3.159
PL - Polonia 2.818
DE - Germania 2.253
FR - Francia 1.787
SE - Svezia 1.322
VN - Vietnam 1.128
NL - Olanda 1.116
CA - Canada 1.078
UA - Ucraina 593
BR - Brasile 590
AT - Austria 317
ZA - Sudafrica 289
IN - India 282
FI - Finlandia 264
HK - Hong Kong 215
KR - Corea 172
EU - Europa 155
TR - Turchia 151
BD - Bangladesh 110
JP - Giappone 91
IQ - Iraq 85
ID - Indonesia 77
AR - Argentina 72
ES - Italia 70
BE - Belgio 68
MX - Messico 56
LT - Lituania 53
CH - Svizzera 50
PK - Pakistan 44
MY - Malesia 43
CZ - Repubblica Ceca 38
CO - Colombia 34
RO - Romania 31
PH - Filippine 29
VE - Venezuela 29
EC - Ecuador 28
SA - Arabia Saudita 25
CL - Cile 22
UZ - Uzbekistan 21
BG - Bulgaria 20
JO - Giordania 18
AE - Emirati Arabi Uniti 16
AU - Australia 16
MA - Marocco 16
KE - Kenya 15
PY - Paraguay 15
TN - Tunisia 15
IR - Iran 14
TW - Taiwan 14
JM - Giamaica 13
LB - Libano 12
PE - Perù 12
AZ - Azerbaigian 11
ET - Etiopia 11
KZ - Kazakistan 11
EG - Egitto 10
GR - Grecia 10
NP - Nepal 10
TH - Thailandia 10
BH - Bahrain 9
PT - Portogallo 9
DZ - Algeria 8
IL - Israele 8
CR - Costa Rica 7
HN - Honduras 7
SC - Seychelles 7
DK - Danimarca 6
LV - Lettonia 6
MN - Mongolia 6
PA - Panama 6
PS - Palestinian Territory 6
BJ - Benin 5
DO - Repubblica Dominicana 5
BO - Bolivia 4
BY - Bielorussia 4
SN - Senegal 4
AL - Albania 3
BA - Bosnia-Erzegovina 3
BB - Barbados 3
GT - Guatemala 3
KG - Kirghizistan 3
MD - Moldavia 3
MU - Mauritius 3
NI - Nicaragua 3
NZ - Nuova Zelanda 3
OM - Oman 3
SY - Repubblica araba siriana 3
TT - Trinidad e Tobago 3
UY - Uruguay 3
A2 - ???statistics.table.value.countryCode.A2??? 2
AM - Armenia 2
AO - Angola 2
CW - ???statistics.table.value.countryCode.CW??? 2
CY - Cipro 2
Totale 80.041
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Città #
Southend 17.591
Dublin 7.722
Warsaw 2.737
Ashburn 2.159
Jacksonville 1.801
San Jose 1.582
Singapore 1.491
Moscow 1.458
Chandler 1.158
Ann Arbor 788
Princeton 674
Council Bluffs 666
Nanjing 645
Beijing 640
Hefei 637
Wilmington 591
Mountain View 549
Woodbridge 542
Munich 517
Dearborn 515
Montréal 510
Dong Ket 466
Fairfield 460
Toronto 448
Boardman 410
Dalmine 388
Mcallen 362
Milan 339
Houston 323
Bergamo 311
Los Angeles 288
Vienna 284
The Dalles 276
Atlanta 272
Johannesburg 269
Shanghai 263
Nanchang 247
Sunnyvale 239
Altamura 237
Lauterbourg 230
Ho Chi Minh City 228
San Mateo 223
Andover 214
Rancio Valcuvia 211
Washington 207
Seattle 204
New York 195
Santa Clara 187
Hong Kong 183
Hanoi 175
Cambridge 170
Zhengzhou 157
Buffalo 153
Columbus 148
London 142
Dallas 123
Redwood City 122
Tianjin 115
Kunming 112
Frankfurt am Main 100
Ogden 97
Guangzhou 90
Shenyang 89
Chicago 86
Kiez 86
Orem 84
Hebei 83
Helsinki 83
São Paulo 77
Amsterdam 72
Tokyo 65
Berlin 64
Brussels 62
Fremont 62
Jiaxing 61
Pavia 60
Redondo Beach 60
Hangzhou 57
Nürnberg 56
Jakarta 54
Needham Heights 51
Montreal 46
Nuremberg 46
Brooklyn 45
Changsha 45
Norwalk 43
Jinan 40
Kocaeli 40
Rome 39
Chennai 36
Seoul 36
Saint Petersburg 35
Changchun 34
Denver 33
Hamburg 33
Phoenix 33
Sakarya 33
San Diego 30
Istanbul 29
Kuala Lumpur 29
Totale 56.658
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Nome #
PixFEL: Enabling technologies, building blocks and architectures for advanced X-ray pixel cameras at the next generation FELs 2.100
0.13μm CMOS technologies for analog front-end circuits in LHC detector upgrades 1.043
A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0 844
130 nm and 90 nm CMOS Technologies for Detector Front-end Applications 823
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC 707
65 nm Technology for HEP: Status and Perspective 684
A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC 637
P-Type Silicon Strip Sensors for the new CMS Tracker at HL-LHC 615
A 10 bit resolution readout channel with dynamic range compression for X-ray imaging at FELs 596
The SuperB Silicon Vertex Tracker 584
A 65 nm CMOS Front-End Chip for High Density Readout of Pixel Sensors 563
3D DNW MAPS for High Resolution, Highly Efficient, Sparse Readout CMOS Detectors 540
A 3D deep n-well CMOS MAPS for the ILC vertex detector 522
Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC 522
Transmission lines implementation on HDI flex circuits for the CMS tracker upgrade 513
Test beam demonstration of silicon microstrip modules with transverse momentum discrimination for the future CMS tracking detector 499
Monolithic pixel detectors in a 0.13 µm CMOS technology with sensor level continuous time charge amplification and shaping 496
2D and 3D CMOS MAPS with high performance pixel-level signal processing 491
Characterisation of irradiated thin silicon sensors for the CMS phase II pixel upgrade 490
Perspectives of 65nm CMOS technologies for high performance front-end electronics 486
Noise performance of 0.13 µm CMOS technologies for detector front-end applications 485
Precision measurement of the structure of the CMS inner tracking system using nuclear interactions 485
Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications 482
Alignment of the CMS tracker with LHC and cosmic ray data 475
A 65-nm CMOS Prototype Chip With Monolithic Pixel Sensors and Fast Front-End Electronics 461
Assessment of a low-power 65 nm CMOS technology for analog front-end design 451
Beam test results for the SuperB-SVT thin striplet detector 449
Impact of lateral isolation oxides on radiation-induced noise degradation in CMOS technologies in the 100-nm regime 446
Description and performance of track and primary-vertex reconstruction with the CMS tracker 443
The SuperB silicon vertex tracker 439
Vertically integrated deep N-well CMOS MAPS with sparsification and time stamping capabilities for thin charged particle trackers 439
Vertical integration approach to the readout of pixel detectors for vertexing applications 437
The front-end chip of the SuperB SVT detector 436
Radiation tolerance of devices and circuits in a 3D technology based on the vertical integration of two 130-nm CMOS layers 432
Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier 431
Design of bandgap reference circuits in a 65 nm CMOS technology for HL-LHC applications 430
Survey of noise performances and scaling effects in deep submicrometer CMOS devices from different foundries 426
Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker 426
Comprehensive study of total ionizing dose damage mechanisms and their effects on noise sources in a 90 nm CMOS technology 424
Total ionizing dose effects on the noise performances of a 0.13 /spl mu/m CMOS technology 418
The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities 417
Mechanisms of Noise Degradation in Low Power 65 nm CMOS Transistors Exposed to Ionizing Radiation 414
2D and 3D thin pixel technologies for the Layer0 of the SuperB Silicon Vertex Tracker 406
Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging 406
Fast Analog Front-end for the Readout of the SuperB SVT Inner Layers 405
A 65 nm Rad-Hard Bandgap Voltage Reference for LHC Environment 404
A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion 401
A new approach to the design of monolithic active pixel detectors in 0.13 µm triple well CMOS technology 399
Front-end performance and charge collection properties of heavily irradiated DNW MAPS 396
Thin pixel development for the superB silicon vertex tracker 392
A pixelated x-ray detector for diffraction imaging at next-generation high-rate FEL sources 386
Investigating degradation mechanisms in 130nm and 90nm commercial CMOS technologies exposed to up to 100 Mrad ionizing radiation dose 386
A novel monolithic active pixel detector in a 0.13 µm triple well CMOS technology with pixel level analog processing 385
Response of SOI bipolar transistors exposed to gamma-rays under different dose rate and bias conditions 381
Noise behavior of a 180 nm CMOS SOI technology for detector front-end electronics 376
Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0 372
The Apsel65 front-end chip for the readout of pixel sensors in the 65 nm CMOS node 371
Monolithic Active Pixel Sensors for the vertex detector at the International Linear Collider 371
Gamma-ray response of SOI bipolar junction transistors for fast, radiation tolerant front-end electronics 368
TID-Induced Degradation in Static and Noise Behavior of Sub-100 nm Multifinger Bulk NMOSFETs 366
Review of radiation effects leading to noise performance degradation in 100-nm scale microelectronic technologies 365
Design criteria for low noise front-end electronics in the 0.13 µm CMOS generation 364
First results from the characterization of a three-dimensional deep N-well MAPS prototype for vertexing applications 364
CMOS MAPS with fully integrated, hybrid-pixel-like analog front-end electronics 363
Monolithic Pixel Sensors for Fast Particle Trackers in a Quadruple Well CMOS Technology 361
Charge signal processors in a 130 nm CMOS technology for the sparse readout of small pitch monolithic and hybrid pixel sensors 359
Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors 358
CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments 358
The readout of the LHC beam luminosity monitor: accurate shower energy measurements at a 40 MHz repetition rate 357
The design of fast analog channels for the readout of strip detectors in the inner layers of the SuperB SVT 357
Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions 354
MAPS with pixel level sparsified readout: from standard CMOS to vertical integration 354
Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker 353
Recent results from the development of silicon detectors with integrated electronics 352
R&D Progress on The SuperB Silicon Vertex Tracker 352
Development of a multi-lead ECG wearable sensor system for biomedical applications 352
65-nm CMOS Front-End Channel for Pixel Readout in the HL-LHC Radiation Environment 352
Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors 351
Monolithic pixel sensors for fast silicon vertex trackers in a quadruple well CMOS technology 350
A Front-End Channel in 65 nm CMOS for Pixel Detectors at the HL-LHC Experiment Upgrades 350
Wearable Sensor System for Multi-lead ECG Measurement 350
Charge Signal Processors in Sparse Readout CMOS MAPS and Hybrid Pixel Sensors for the SuperB Layer0 348
A 4096-pixel MAPS device with on-chip data sparsification 348
Performance of a DNW CMOS active pixel sensor designed for the ILC Vertex Detector 347
Pixel-Level Continuous-Time Analog Signal Processing for 130 nm CMOS MAPS 347
Noise analysis of NPN SOI bipolar transistors for the design of charge measuring systems 346
A quadruple well CMOS MAPS prototype for the Layer0 of the SuperB SVT 344
Proton-induced damage in JFET transistors and charge preamplifiers on high-resistivity silicon 344
Design and Performance of Analog Circuits for DNW-MAPS in 100-nm-scale CMOS Technology 344
Instrumentation for gate current noise measurements on sub-100 nm MOS transistors 342
Minimum noise design of charge amplifiers with CMOS processes in the 100 nm feature size range 342
Latest results of the R&D on CMOS MAPS for the Layer0 of the SuperB SVT 342
Beam test performance of prototype silicon detectors for the Outer Tracker for the Phase-2 Upgrade of CMS 341
TID effects in deep N-well CMOS monolithic active pixel sensors 340
Perspectives for low noise detector readout in a sub-quarter-micron CMOS SOI technology 340
Beam test results of different configurations of deep N-well MAPS matrices featuring in pixel full signal processing 339
Low noise design issues for analog front-end electronics in 130 nm and 90 nm CMOS technologies 339
Analog front-end for monolithic and hybrid pixels in a vertical integration CMOS technology 337
CMOS MAPS in a homogeneous 3D process for charged particle tracking 336
Active pixel sensors with enhanced pixel-level analog and digital functionalities in a 2-tier 3D CMOS technology 336
Totale 44.450
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Categoria #
all - tutte 237.829
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 237.829
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021847 0 0 0 0 0 0 0 0 0 0 0 847
2021/20226.594 560 831 388 441 635 969 300 310 395 724 676 365
2022/20235.255 830 616 789 782 453 635 44 230 392 103 231 150
2023/20249.955 136 259 260 215 340 2.056 5.804 351 178 55 59 242
2024/20257.242 349 587 372 1.118 163 120 99 373 642 1.323 1.201 895
2025/202614.324 674 763 1.055 1.456 2.400 1.027 2.257 772 1.223 1.048 695 954
Totale 81.588