TRAVERSI, Gianluca
 Distribuzione geografica
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Continente #
EU - Europa 45.370
NA - Nord America 23.195
AS - Asia 10.752
Continente sconosciuto - Info sul continente non disponibili 1.653
SA - Sud America 823
AF - Africa 404
OC - Oceania 21
Totale 82.218
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Nazione #
US - Stati Uniti d'America 21.963
GB - Regno Unito 18.752
IE - Irlanda 7.736
RU - Federazione Russa 4.798
CN - Cina 4.596
SG - Singapore 3.491
IT - Italia 3.209
PL - Polonia 2.819
DE - Germania 2.254
FR - Francia 1.780
SE - Svezia 1.351
VN - Vietnam 1.129
NL - Olanda 1.116
CA - Canada 1.098
BR - Brasile 596
UA - Ucraina 592
AT - Austria 315
ZA - Sudafrica 288
IN - India 282
FI - Finlandia 264
HK - Hong Kong 225
KR - Corea 172
EU - Europa 154
TR - Turchia 151
BD - Bangladesh 120
JP - Giappone 92
IQ - Iraq 85
ID - Indonesia 78
ES - Italia 75
AR - Argentina 72
BE - Belgio 68
MX - Messico 59
LT - Lituania 53
CH - Svizzera 45
MY - Malesia 44
PK - Pakistan 44
CZ - Repubblica Ceca 38
CO - Colombia 37
RO - Romania 31
EC - Ecuador 29
PH - Filippine 29
VE - Venezuela 29
SA - Arabia Saudita 25
CL - Cile 22
UZ - Uzbekistan 21
BG - Bulgaria 20
JO - Giordania 18
AE - Emirati Arabi Uniti 16
AU - Australia 16
JM - Giamaica 16
MA - Marocco 16
KE - Kenya 15
PY - Paraguay 15
TN - Tunisia 15
TW - Taiwan 15
IR - Iran 14
LB - Libano 12
PE - Perù 12
AZ - Azerbaigian 11
ET - Etiopia 11
KZ - Kazakistan 11
CR - Costa Rica 10
EG - Egitto 10
GR - Grecia 10
NP - Nepal 10
TH - Thailandia 10
BH - Bahrain 9
HN - Honduras 9
PT - Portogallo 9
DZ - Algeria 8
IL - Israele 8
SC - Seychelles 8
TT - Trinidad e Tobago 7
DK - Danimarca 6
LV - Lettonia 6
MN - Mongolia 6
PA - Panama 6
PS - Palestinian Territory 6
BJ - Benin 5
DO - Repubblica Dominicana 5
GT - Guatemala 5
UY - Uruguay 5
BO - Bolivia 4
BY - Bielorussia 4
NI - Nicaragua 4
SN - Senegal 4
AL - Albania 3
BA - Bosnia-Erzegovina 3
BB - Barbados 3
KG - Kirghizistan 3
MD - Moldavia 3
MU - Mauritius 3
NZ - Nuova Zelanda 3
OM - Oman 3
PR - Porto Rico 3
SY - Repubblica araba siriana 3
A2 - ???statistics.table.value.countryCode.A2??? 2
AM - Armenia 2
AO - Angola 2
CW - ???statistics.table.value.countryCode.CW??? 2
Totale 80.672
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Città #
Southend 17.529
Dublin 7.687
Warsaw 2.737
Ashburn 2.229
Jacksonville 1.796
San Jose 1.579
Singapore 1.511
Moscow 1.452
Chandler 1.158
Council Bluffs 860
Ann Arbor 786
Princeton 670
Beijing 646
Nanjing 640
Hefei 636
Wilmington 589
Mountain View 549
Woodbridge 542
Munich 517
Dearborn 515
Montréal 510
Dong Ket 466
Fairfield 460
Toronto 447
Boardman 409
Dalmine 389
Mcallen 362
Milan 352
Houston 324
Bergamo 311
Los Angeles 295
Vienna 282
The Dalles 276
Atlanta 275
Santa Clara 270
Shanghai 269
Johannesburg 268
Nanchang 247
Sunnyvale 239
Altamura 235
Lauterbourg 229
Ho Chi Minh City 228
San Mateo 222
Andover 214
Rancio Valcuvia 211
Washington 207
Seattle 205
New York 197
Hong Kong 193
Hanoi 175
Cambridge 171
Columbus 170
Zhengzhou 157
Buffalo 152
London 141
Dallas 134
Redwood City 122
Tianjin 115
Kunming 112
Frankfurt am Main 101
Ogden 96
Chicago 93
Guangzhou 90
Shenyang 89
Kiez 86
Orem 84
Hebei 83
Helsinki 83
São Paulo 79
Amsterdam 72
Tokyo 66
Berlin 64
Brussels 62
Fremont 62
Jiaxing 61
Pavia 60
Redondo Beach 60
Hangzhou 57
Nürnberg 56
Jakarta 54
Needham Heights 51
Montreal 49
Nuremberg 48
Rome 46
Brooklyn 45
Changsha 45
Norwalk 43
Jinan 40
Kocaeli 40
Chennai 36
Phoenix 36
Seoul 36
Denver 35
Saint Petersburg 35
Changchun 34
Hamburg 33
Sakarya 33
Boston 30
Kuala Lumpur 30
San Diego 30
Totale 57.002
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Nome #
PixFEL: Enabling technologies, building blocks and architectures for advanced X-ray pixel cameras at the next generation FELs 2.104
0.13μm CMOS technologies for analog front-end circuits in LHC detector upgrades 1.046
A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0 846
130 nm and 90 nm CMOS Technologies for Detector Front-end Applications 828
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC 708
65 nm Technology for HEP: Status and Perspective 686
A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC 644
P-Type Silicon Strip Sensors for the new CMS Tracker at HL-LHC 621
A 10 bit resolution readout channel with dynamic range compression for X-ray imaging at FELs 598
The SuperB Silicon Vertex Tracker 586
A 65 nm CMOS Front-End Chip for High Density Readout of Pixel Sensors 565
3D DNW MAPS for High Resolution, Highly Efficient, Sparse Readout CMOS Detectors 545
Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC 527
A 3D deep n-well CMOS MAPS for the ILC vertex detector 525
Transmission lines implementation on HDI flex circuits for the CMS tracker upgrade 515
Test beam demonstration of silicon microstrip modules with transverse momentum discrimination for the future CMS tracking detector 502
Monolithic pixel detectors in a 0.13 µm CMOS technology with sensor level continuous time charge amplification and shaping 501
Characterisation of irradiated thin silicon sensors for the CMS phase II pixel upgrade 495
2D and 3D CMOS MAPS with high performance pixel-level signal processing 494
Noise performance of 0.13 µm CMOS technologies for detector front-end applications 492
Perspectives of 65nm CMOS technologies for high performance front-end electronics 487
Precision measurement of the structure of the CMS inner tracking system using nuclear interactions 487
Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications 487
Alignment of the CMS tracker with LHC and cosmic ray data 479
A 65-nm CMOS Prototype Chip With Monolithic Pixel Sensors and Fast Front-End Electronics 465
Assessment of a low-power 65 nm CMOS technology for analog front-end design 461
Beam test results for the SuperB-SVT thin striplet detector 453
Impact of lateral isolation oxides on radiation-induced noise degradation in CMOS technologies in the 100-nm regime 452
Description and performance of track and primary-vertex reconstruction with the CMS tracker 446
The SuperB silicon vertex tracker 442
Radiation tolerance of devices and circuits in a 3D technology based on the vertical integration of two 130-nm CMOS layers 442
Vertically integrated deep N-well CMOS MAPS with sparsification and time stamping capabilities for thin charged particle trackers 441
Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier 440
Vertical integration approach to the readout of pixel detectors for vertexing applications 438
The front-end chip of the SuperB SVT detector 437
Design of bandgap reference circuits in a 65 nm CMOS technology for HL-LHC applications 436
Survey of noise performances and scaling effects in deep submicrometer CMOS devices from different foundries 434
Comprehensive study of total ionizing dose damage mechanisms and their effects on noise sources in a 90 nm CMOS technology 429
Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker 428
Total ionizing dose effects on the noise performances of a 0.13 /spl mu/m CMOS technology 426
The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities 421
Mechanisms of Noise Degradation in Low Power 65 nm CMOS Transistors Exposed to Ionizing Radiation 418
2D and 3D thin pixel technologies for the Layer0 of the SuperB Silicon Vertex Tracker 410
Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging 409
A 65 nm Rad-Hard Bandgap Voltage Reference for LHC Environment 408
Fast Analog Front-end for the Readout of the SuperB SVT Inner Layers 406
A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion 406
A new approach to the design of monolithic active pixel detectors in 0.13 µm triple well CMOS technology 400
Front-end performance and charge collection properties of heavily irradiated DNW MAPS 397
Thin pixel development for the superB silicon vertex tracker 393
Investigating degradation mechanisms in 130nm and 90nm commercial CMOS technologies exposed to up to 100 Mrad ionizing radiation dose 389
A novel monolithic active pixel detector in a 0.13 µm triple well CMOS technology with pixel level analog processing 388
A pixelated x-ray detector for diffraction imaging at next-generation high-rate FEL sources 388
Response of SOI bipolar transistors exposed to gamma-rays under different dose rate and bias conditions 383
Noise behavior of a 180 nm CMOS SOI technology for detector front-end electronics 378
Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0 375
Gamma-ray response of SOI bipolar junction transistors for fast, radiation tolerant front-end electronics 374
Monolithic Active Pixel Sensors for the vertex detector at the International Linear Collider 374
The Apsel65 front-end chip for the readout of pixel sensors in the 65 nm CMOS node 372
Review of radiation effects leading to noise performance degradation in 100-nm scale microelectronic technologies 369
TID-Induced Degradation in Static and Noise Behavior of Sub-100 nm Multifinger Bulk NMOSFETs 368
First results from the characterization of a three-dimensional deep N-well MAPS prototype for vertexing applications 366
Design criteria for low noise front-end electronics in the 0.13 µm CMOS generation 365
CMOS MAPS with fully integrated, hybrid-pixel-like analog front-end electronics 363
The readout of the LHC beam luminosity monitor: accurate shower energy measurements at a 40 MHz repetition rate 362
Charge signal processors in a 130 nm CMOS technology for the sparse readout of small pitch monolithic and hybrid pixel sensors 362
Monolithic Pixel Sensors for Fast Particle Trackers in a Quadruple Well CMOS Technology 362
Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors 361
The design of fast analog channels for the readout of strip detectors in the inner layers of the SuperB SVT 361
CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments 360
Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker 359
R&D Progress on The SuperB Silicon Vertex Tracker 357
Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions 356
A Front-End Channel in 65 nm CMOS for Pixel Detectors at the HL-LHC Experiment Upgrades 356
Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors 355
MAPS with pixel level sparsified readout: from standard CMOS to vertical integration 355
65-nm CMOS Front-End Channel for Pixel Readout in the HL-LHC Radiation Environment 355
Recent results from the development of silicon detectors with integrated electronics 354
Development of a multi-lead ECG wearable sensor system for biomedical applications 353
Monolithic pixel sensors for fast silicon vertex trackers in a quadruple well CMOS technology 352
Wearable Sensor System for Multi-lead ECG Measurement 351
Charge Signal Processors in Sparse Readout CMOS MAPS and Hybrid Pixel Sensors for the SuperB Layer0 350
A 4096-pixel MAPS device with on-chip data sparsification 350
Performance of a DNW CMOS active pixel sensor designed for the ILC Vertex Detector 349
Noise analysis of NPN SOI bipolar transistors for the design of charge measuring systems 349
Pixel-Level Continuous-Time Analog Signal Processing for 130 nm CMOS MAPS 348
Design and Performance of Analog Circuits for DNW-MAPS in 100-nm-scale CMOS Technology 348
A quadruple well CMOS MAPS prototype for the Layer0 of the SuperB SVT 347
Proton-induced damage in JFET transistors and charge preamplifiers on high-resistivity silicon 347
Minimum noise design of charge amplifiers with CMOS processes in the 100 nm feature size range 345
Beam test performance of prototype silicon detectors for the Outer Tracker for the Phase-2 Upgrade of CMS 344
Latest results of the R&D on CMOS MAPS for the Layer0 of the SuperB SVT 344
Instrumentation for gate current noise measurements on sub-100 nm MOS transistors 343
Beam test results of different configurations of deep N-well MAPS matrices featuring in pixel full signal processing 342
TID effects in deep N-well CMOS monolithic active pixel sensors 341
Perspectives for low noise detector readout in a sub-quarter-micron CMOS SOI technology 341
Analog front-end for monolithic and hybrid pixels in a vertical integration CMOS technology 341
Low noise design issues for analog front-end electronics in 130 nm and 90 nm CMOS technologies 341
Active pixel sensors with enhanced pixel-level analog and digital functionalities in a 2-tier 3D CMOS technology 341
Quadruple well CMOS MAPS with time-invariant processor exposed to ionizing radiation and neutrons 338
Totale 44.778
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Categoria #
all - tutte 246.146
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 246.146
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20226.008 0 828 385 438 631 966 299 310 393 720 673 365
2022/20235.243 826 612 787 781 453 635 44 230 392 103 230 150
2023/20249.916 136 259 260 214 340 2.049 5.777 349 177 55 59 241
2024/20257.226 349 585 372 1.116 163 120 98 372 640 1.321 1.197 893
2025/202614.360 673 761 1.051 1.454 2.395 1.025 2.252 772 1.221 1.046 694 1.016
2026/2027767 370 397 0 0 0 0 0 0 0 0 0 0
Totale 82.218