The Italian Silicon-detectors-with-Low-Interaction-with Material collaboration (SLIM5) has designed, fabricated and tested several prototypes of CMOS Monolithic Active Pixel Sensors (MAPS). This paper shows the design of a new mixed-mode chip prototype composed of a bidimensional matrix of pixels, and of an off-pixel digital readout sparsificarion circuit. The readout logic is based on commercial standard cells and implements an optimized non token readout technique. Also, a MAPS emulator software toool is presented. The project is aimed at overcoming the readout speed limit of future large-matrix pixel detectors for particle tracking, by matching the requirements of future high-energy physics experiments. The readout architecture extends the flexibility of the MAPS devices to be also used in first level triggers on tracks in vertex detectors.
(2008). Proposal of a data sparsification unit for a mixed-mode MAPS detector . Retrieved from http://hdl.handle.net/10446/121067
Proposal of a data sparsification unit for a mixed-mode MAPS detector
Manghisoni, M.;Re, V.;Traversi, G.;
2008-01-01
Abstract
The Italian Silicon-detectors-with-Low-Interaction-with Material collaboration (SLIM5) has designed, fabricated and tested several prototypes of CMOS Monolithic Active Pixel Sensors (MAPS). This paper shows the design of a new mixed-mode chip prototype composed of a bidimensional matrix of pixels, and of an off-pixel digital readout sparsificarion circuit. The readout logic is based on commercial standard cells and implements an optimized non token readout technique. Also, a MAPS emulator software toool is presented. The project is aimed at overcoming the readout speed limit of future large-matrix pixel detectors for particle tracking, by matching the requirements of future high-energy physics experiments. The readout architecture extends the flexibility of the MAPS devices to be also used in first level triggers on tracks in vertex detectors.File | Dimensione del file | Formato | |
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