This paper presents the characterization of an input/output interface circuit designed for multi-purpose pattern recognition applications compatible with low-voltage fully differential signaling (LVDS) standard. The driver and receiver circuits described in this work has been designed and fabricated in a 28 nm CMOS technology. The prototype chip has been mounted on a printed circuit board with physical characteristics similar to the real application case and fully validated up to 1 Gb/s with input random patterns.
(2018). Characterization of an LVDS Link in 28 nm CMOS for Multi-Purpose Pattern Recognition . Retrieved from http://hdl.handle.net/10446/131820
Characterization of an LVDS Link in 28 nm CMOS for Multi-Purpose Pattern Recognition
Traversi, Gianluca;
2018-01-01
Abstract
This paper presents the characterization of an input/output interface circuit designed for multi-purpose pattern recognition applications compatible with low-voltage fully differential signaling (LVDS) standard. The driver and receiver circuits described in this work has been designed and fabricated in a 28 nm CMOS technology. The prototype chip has been mounted on a printed circuit board with physical characteristics similar to the real application case and fully validated up to 1 Gb/s with input random patterns.| File | Dimensione del file | Formato | |
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