Deep N-well CMOS monolithic active pixel sensors (DNW MAPS) represent an alternative approach to signal processing in pixellated detectors for high energy physics experiments. Based on different resolution constraints, two prototype MAPS, suitable for applications requiring different detector pitch, have been developed and fabricated in 130 nm triple well CMOS technology. This work presents experimental results from the characterization of some test structures together with TCAD and Monte Carlo simulations intended to study the device properties in terms of charge diffusion and charge sharing among pixels.

(2007). MAPS in 130 nm triple well CMOS technology for HEP applications [conference presentation - intervento a convegno]. Retrieved from http://hdl.handle.net/10446/21320

MAPS in 130 nm triple well CMOS technology for HEP applications

MANGHISONI, Massimo;RE, Valerio;TRAVERSI, Gianluca
2007-01-01

Abstract

Deep N-well CMOS monolithic active pixel sensors (DNW MAPS) represent an alternative approach to signal processing in pixellated detectors for high energy physics experiments. Based on different resolution constraints, two prototype MAPS, suitable for applications requiring different detector pitch, have been developed and fabricated in 130 nm triple well CMOS technology. This work presents experimental results from the characterization of some test structures together with TCAD and Monte Carlo simulations intended to study the device properties in terms of charge diffusion and charge sharing among pixels.
2007
Manghisoni, Massimo; Re, Valerio; Ratti, Lodovico; Pozzati, Enrico; Speziali, Valeria; Traversi, Gianluca
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10446/21320
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