This work is concerned with the design criteria and the experimental characterization of front-end electronics in a 65 nm CMOS technology for the readout of hybrid pixels and of monolithic active pixel sensors using a deep N-well as their collecting electrode. The work will present a summary of the experimental results relevant to a prototype chip, named Apsel65, focusing particularly on the front-end processor features and performance.

(2011). The Apsel65 front-end chip for the readout of pixel sensors in the 65 nm CMOS node [conference presentation - intervento a convegno]. Retrieved from http://hdl.handle.net/10446/25642

The Apsel65 front-end chip for the readout of pixel sensors in the 65 nm CMOS node

GAIONI, Luigi;MANGHISONI, Massimo;RE, Valerio;TRAVERSI, Gianluca
2011-01-01

Abstract

This work is concerned with the design criteria and the experimental characterization of front-end electronics in a 65 nm CMOS technology for the readout of hybrid pixels and of monolithic active pixel sensors using a deep N-well as their collecting electrode. The work will present a summary of the experimental results relevant to a prototype chip, named Apsel65, focusing particularly on the front-end processor features and performance.
2011
Gaioni, Luigi; Manghisoni, Massimo; Ratti, Lodovico; Re, Valerio; Traversi, Gianluca
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10446/25642
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