The DSSC (DEPFET Sensor with Signal Compression) consortium develops a 1MPixel detector for low energy X-rays at the European XFEL. The XFEL will produce 10 bursts per second, each containing 2880 X-ray pulses with a repetition rate of 4.5 MHz. X-ray photons of 0.5 − 6 keV are absorbed in hexagonal DEPFET pixels of 229x204 um^2 pitch with a nonlinear characteristic to achieve a high dynamic range. The sensors will be bump bonded to readout ASICs of 64x64 pixels. Each pixel contains a filter with trapezoidal weighting function, a single slope ADC of 8-9 Bit resolution and a digital memory to store 640 events. A veto mechanism allows to discard uninteresting events. The digital hit data is read out serially during the ≈ 100 ms long burst gaps. Prototype matrix chips of 8x8 pixels with the full functionality have been produced and characterized electronically and with DEPFET sensors. The architecture and the design of the 8x8 ASIC, measured results and an outlook to the large 64x64 pixel chip will be presented.
(2012). The DSSC Pixel Readout ASIC with Amplitude Digitization and Local Storage for DEPFET Sensor Matrices at the European XFEL [conference presentation - intervento a convegno]. Retrieved from http://hdl.handle.net/10446/28008
The DSSC Pixel Readout ASIC with Amplitude Digitization and Local Storage for DEPFET Sensor Matrices at the European XFEL
COMOTTI, Daniele;MANGHISONI, Massimo;QUARTIERI, Emanuele;
2012-12-01
Abstract
The DSSC (DEPFET Sensor with Signal Compression) consortium develops a 1MPixel detector for low energy X-rays at the European XFEL. The XFEL will produce 10 bursts per second, each containing 2880 X-ray pulses with a repetition rate of 4.5 MHz. X-ray photons of 0.5 − 6 keV are absorbed in hexagonal DEPFET pixels of 229x204 um^2 pitch with a nonlinear characteristic to achieve a high dynamic range. The sensors will be bump bonded to readout ASICs of 64x64 pixels. Each pixel contains a filter with trapezoidal weighting function, a single slope ADC of 8-9 Bit resolution and a digital memory to store 640 events. A veto mechanism allows to discard uninteresting events. The digital hit data is read out serially during the ≈ 100 ms long burst gaps. Prototype matrix chips of 8x8 pixels with the full functionality have been produced and characterized electronically and with DEPFET sensors. The architecture and the design of the 8x8 ASIC, measured results and an outlook to the large 64x64 pixel chip will be presented.Pubblicazioni consigliate
Aisberg ©2008 Servizi bibliotecari, Università degli studi di Bergamo | Terms of use/Condizioni di utilizzo