This work is concerned with the design and the experimental characterization of analog front-end electronics conceived for experiments with unprecedented particle rates and radiation levels at future high-energy physics colliders. A prototype chip integrating different test structures has been submitted in the framework of the CHIPIX65 project. These structures are standalone channels for the readout of hybrid pixels, featuring a charge sensitive preamplifier as the first stage of the readout chain, a high-speed comparator and a circuit for fine threshold tuning. The paper thoroughly discusses the results, mainly focused on the charge sensitive amplifier, coming from the characterization of the submitted test structures.
(2016). 65 nm CMOS analog front-end for pixel detectors at the HL-LHC [journal article - articolo]. In JOURNAL OF INSTRUMENTATION. Retrieved from http://hdl.handle.net/10446/73013
65 nm CMOS analog front-end for pixel detectors at the HL-LHC
GAIONI, Luigi;MANGHISONI, Massimo;RE, Valerio;TRAVERSI, Gianluca
2016-02-16
Abstract
This work is concerned with the design and the experimental characterization of analog front-end electronics conceived for experiments with unprecedented particle rates and radiation levels at future high-energy physics colliders. A prototype chip integrating different test structures has been submitted in the framework of the CHIPIX65 project. These structures are standalone channels for the readout of hybrid pixels, featuring a charge sensitive preamplifier as the first stage of the readout chain, a high-speed comparator and a circuit for fine threshold tuning. The paper thoroughly discusses the results, mainly focused on the charge sensitive amplifier, coming from the characterization of the submitted test structures.File | Dimensione del file | Formato | |
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