The Upgrade of the Belle II vertex detector (VTX) at the SuperKEKB accelerator in Japan is foreseen to improve tracking performance at the expected high beam backgrounds at target luminosity of 6 × 1035 cm-2s-1. The OBELIX-1 chip is specifically developed for this purpose and used as sensor on all VTX layers. OBELIX-1 is a depleted monolithic active pixel sensor in 180 nm technology. The pixel matrix is inherited from TJ-Monopix2, but the periphery of the chip is entirely reworked. A newly designed 2-stage pixel memory matches Belle II trigger requirements. OBELIX-1 includes LDO regulators and a precision timing module with less than 3ns resolution. Furthermore, the chip can also contribute to the Belle II trigger system with low latency, low granularity real-time streaming of pixel data in parallel to regular operation. Details of the inner working of the trigger memory are presented, as well as performance simulations to validate the requirements for the VTX Upgrade. The trigger memo...
(2025). OBELIX: A monolithic pixel sensor with triggered readout for the Belle II upgrade [journal article - articolo]. In NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH. SECTION A, ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT. Retrieved from https://hdl.handle.net/10446/304745
OBELIX: A monolithic pixel sensor with triggered readout for the Belle II upgrade
Gaioni L.;Re V.;Riceputi E.;Traversi G.;
2025-06-02
Abstract
The Upgrade of the Belle II vertex detector (VTX) at the SuperKEKB accelerator in Japan is foreseen to improve tracking performance at the expected high beam backgrounds at target luminosity of 6 × 1035 cm-2s-1. The OBELIX-1 chip is specifically developed for this purpose and used as sensor on all VTX layers. OBELIX-1 is a depleted monolithic active pixel sensor in 180 nm technology. The pixel matrix is inherited from TJ-Monopix2, but the periphery of the chip is entirely reworked. A newly designed 2-stage pixel memory matches Belle II trigger requirements. OBELIX-1 includes LDO regulators and a precision timing module with less than 3ns resolution. Furthermore, the chip can also contribute to the Belle II trigger system with low latency, low granularity real-time streaming of pixel data in parallel to regular operation. Details of the inner working of the trigger memory are presented, as well as performance simulations to validate the requirements for the VTX Upgrade. The trigger memo...| File | Dimensione del file | Formato | |
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