A 65-nm CMOS Readout Channel Based on a Charge Amplifier With DTMOS Feedback for Dynamic Signal Compression

This article presents the design and experimental characterization of a low-noise analog readout channel implemented in a commercial 65-nm CMOS technology. The circuit targets the readout of large-area silicon-strip detectors for astroparticle physics tracker applications and is based on a charge-sensitive amplifier followed by a unipolar semi-Gaussian time-invariant filter. Dynamic signal compression is achieved by exploiting the nonlinear behavior of a dynamic-threshold MOS capacitor in the amplifier feedback network, providing a gain that decreases with increasing input signal and enabling a wide input dynamic range while maintaining high resolution at low deposited charge. The amplifier also incorporates an enhanced Krummenacher feedback network that, through an additional bulk-controlled device, compensates detector leakage currents up to 200 nA. The design criteria and circuit architecture are described, with emphasis on the dynamic-threshold capacitor and the improved charge restoration network. Experimental results are presented to validate and support the proposed design and architectural choices.