GAIONI, Luigi
 Distribuzione geografica
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Continente #
EU - Europa 29.673
NA - Nord America 17.408
AS - Asia 7.409
Continente sconosciuto - Info sul continente non disponibili 1.143
SA - Sud America 684
AF - Africa 293
OC - Oceania 17
Totale 56.627
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Nazione #
US - Stati Uniti d'America 16.573
GB - Regno Unito 11.339
IE - Irlanda 5.045
RU - Federazione Russa 3.201
CN - Cina 2.944
SG - Singapore 2.549
PL - Polonia 2.463
IT - Italia 2.357
DE - Germania 1.232
FR - Francia 1.198
NL - Olanda 930
SE - Svezia 906
VN - Vietnam 767
CA - Canada 481
BR - Brasile 464
UA - Ucraina 372
ZA - Sudafrica 201
FI - Finlandia 195
HK - Hong Kong 176
IN - India 174
AT - Austria 149
EU - Europa 127
KR - Corea 116
TR - Turchia 109
BD - Bangladesh 94
ID - Indonesia 80
JP - Giappone 78
AR - Argentina 66
IQ - Iraq 64
ES - Italia 58
MX - Messico 55
CO - Colombia 50
LT - Lituania 45
CR - Costa Rica 42
BE - Belgio 39
HN - Honduras 39
EC - Ecuador 36
PK - Pakistan 36
SV - El Salvador 36
MY - Malesia 35
GP - Guadalupe 34
GT - Guatemala 34
TT - Trinidad e Tobago 34
CZ - Repubblica Ceca 28
CH - Svizzera 26
CW - ???statistics.table.value.countryCode.CW??? 26
VE - Venezuela 24
PH - Filippine 22
PR - Porto Rico 22
NI - Nicaragua 21
SA - Arabia Saudita 20
JM - Giamaica 18
BG - Bulgaria 17
RO - Romania 17
CL - Cile 16
TN - Tunisia 16
UZ - Uzbekistan 16
AU - Australia 14
TW - Taiwan 14
MA - Marocco 13
PY - Paraguay 13
IL - Israele 12
LB - Libano 12
GR - Grecia 11
JO - Giordania 11
KE - Kenya 11
KZ - Kazakistan 11
AE - Emirati Arabi Uniti 9
IR - Iran 9
TH - Thailandia 9
AZ - Azerbaigian 8
PE - Perù 8
EG - Egitto 7
NP - Nepal 7
DK - Danimarca 6
EE - Estonia 6
ET - Etiopia 6
SC - Seychelles 6
BB - Barbados 5
DZ - Algeria 5
LV - Lettonia 5
PA - Panama 5
PS - Palestinian Territory 5
BH - Bahrain 4
BY - Bielorussia 4
DO - Repubblica Dominicana 4
OM - Oman 4
UY - Uruguay 4
AL - Albania 3
AO - Angola 3
BA - Bosnia-Erzegovina 3
HU - Ungheria 3
MN - Mongolia 3
PT - Portogallo 3
SN - Senegal 3
AM - Armenia 2
BO - Bolivia 2
CG - Congo 2
CI - Costa d'Avorio 2
CY - Cipro 2
Totale 55.591
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Città #
Southend 10.810
Dublin 5.017
Warsaw 2.405
Ashburn 1.735
San Jose 1.329
Council Bluffs 1.242
Singapore 1.127
Jacksonville 1.110
Moscow 1.042
Chandler 690
Woodbridge 463
Wilmington 458
Hefei 456
Ann Arbor 448
Princeton 430
Fairfield 407
Beijing 400
Nanjing 387
Mountain View 384
Dearborn 313
Dong Ket 298
Dalmine 294
Toronto 292
Boardman 264
Milan 264
Houston 257
Santa Clara 248
Los Angeles 243
Bergamo 215
Seattle 198
Sunnyvale 198
Shanghai 194
The Dalles 194
Atlanta 188
Johannesburg 184
New York 174
Rancio Valcuvia 163
Cambridge 160
Nanchang 160
Ho Chi Minh City 159
Lauterbourg 156
Columbus 155
Hong Kong 154
Altamura 143
Andover 140
San Mateo 135
Vienna 129
Hanoi 121
Washington 121
Buffalo 103
London 97
Chicago 83
Redwood City 83
Zhengzhou 76
Tianjin 74
Frankfurt am Main 70
Dallas 69
Helsinki 68
São Paulo 67
Orem 62
Kunming 61
Phoenix 59
Tokyo 59
Rome 57
Ogden 56
Shenyang 55
Berlin 54
Montreal 53
Guangzhou 50
Kiez 50
Hebei 49
Jakarta 49
Munich 49
Pavia 48
Amsterdam 47
Redondo Beach 47
Nuremberg 46
Brooklyn 45
Fremont 43
Nürnberg 40
Hangzhou 39
Jiaxing 38
Brussels 36
Denver 33
Kocaeli 33
San José 33
San Salvador 32
Changsha 31
Lappeenranta 30
Norwalk 30
Philadelphia 29
Seoul 29
Jinan 28
Naples 27
San Diego 27
Willemstad 26
Needham Heights 25
Chennai 24
Guatemala City 24
Pisa 24
Totale 38.721
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Nome #
A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0 867
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC 719
65 nm Technology for HEP: Status and Perspective 695
A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC 656
P-Type Silicon Strip Sensors for the new CMS Tracker at HL-LHC 636
The SuperB Silicon Vertex Tracker 609
A 65 nm CMOS Front-End Chip for High Density Readout of Pixel Sensors 606
3D DNW MAPS for High Resolution, Highly Efficient, Sparse Readout CMOS Detectors 565
A 3D deep n-well CMOS MAPS for the ILC vertex detector 540
Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC 538
Test beam demonstration of silicon microstrip modules with transverse momentum discrimination for the future CMS tracking detector 514
2D and 3D CMOS MAPS with high performance pixel-level signal processing 512
Characterisation of irradiated thin silicon sensors for the CMS phase II pixel upgrade 509
Perspectives of 65nm CMOS technologies for high performance front-end electronics 506
Precision measurement of the structure of the CMS inner tracking system using nuclear interactions 498
Alignment of the CMS tracker with LHC and cosmic ray data 496
Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications 496
A 65-nm CMOS Prototype Chip With Monolithic Pixel Sensors and Fast Front-End Electronics 482
Assessment of a low-power 65 nm CMOS technology for analog front-end design 481
Beam test results for the SuperB-SVT thin striplet detector 476
Design and test of a 65nm CMOS front-end with zero dead time for next generation pixel detectors 468
Vertically integrated deep N-well CMOS MAPS with sparsification and time stamping capabilities for thin charged particle trackers 461
Radiation tolerance of devices and circuits in a 3D technology based on the vertical integration of two 130-nm CMOS layers 460
Description and performance of track and primary-vertex reconstruction with the CMS tracker 460
The SuperB silicon vertex tracker 459
Design of bandgap reference circuits in a 65 nm CMOS technology for HL-LHC applications 455
Vertical integration approach to the readout of pixel detectors for vertexing applications 453
Comprehensive study of total ionizing dose damage mechanisms and their effects on noise sources in a 90 nm CMOS technology 450
Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier 450
The front-end chip of the SuperB SVT detector 447
Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker 442
Mechanisms of Noise Degradation in Low Power 65 nm CMOS Transistors Exposed to Ionizing Radiation 431
Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging 429
2D and 3D thin pixel technologies for the Layer0 of the SuperB Silicon Vertex Tracker 421
Fast Analog Front-end for the Readout of the SuperB SVT Inner Layers 420
Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0 420
Thin pixel development for the superB silicon vertex tracker 401
Investigating degradation mechanisms in 130nm and 90nm commercial CMOS technologies exposed to up to 100 Mrad ionizing radiation dose 398
Noise behavior of a 180 nm CMOS SOI technology for detector front-end electronics 390
The Apsel65 front-end chip for the readout of pixel sensors in the 65 nm CMOS node 388
First results from the characterization of a three-dimensional deep N-well MAPS prototype for vertexing applications 386
TID-Induced Degradation in Static and Noise Behavior of Sub-100 nm Multifinger Bulk NMOSFETs 382
Review of radiation effects leading to noise performance degradation in 100-nm scale microelectronic technologies 379
CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments 378
Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions 378
A 65 nm CMOS analog processor with zero dead time for future pixel detectors 378
Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors 377
Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker 377
Monolithic Pixel Sensors for Fast Particle Trackers in a Quadruple Well CMOS Technology 376
Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors 372
The design of fast analog channels for the readout of strip detectors in the inner layers of the SuperB SVT 369
Development of a multi-lead ECG wearable sensor system for biomedical applications 366
Monolithic pixel sensors for fast silicon vertex trackers in a quadruple well CMOS technology 365
A Front-End Channel in 65 nm CMOS for Pixel Detectors at the HL-LHC Experiment Upgrades 365
R&D Progress on The SuperB Silicon Vertex Tracker 364
MAPS with pixel level sparsified readout: from standard CMOS to vertical integration 362
65-nm CMOS Front-End Channel for Pixel Readout in the HL-LHC Radiation Environment 362
Charge Signal Processors in Sparse Readout CMOS MAPS and Hybrid Pixel Sensors for the SuperB Layer0 360
A 4096-pixel MAPS device with on-chip data sparsification 360
Wearable Sensor System for Multi-lead ECG Measurement 359
Active pixel sensors with enhanced pixel-level analog and digital functionalities in a 2-tier 3D CMOS technology 358
CMOS MAPS in a homogeneous 3D process for charged particle tracking 357
Review of radiation damage studies on DNW CMOS MAPS 357
Instrumentation for gate current noise measurements on sub-100 nm MOS transistors 357
TID effects in deep N-well CMOS monolithic active pixel sensors 356
Latest results of the R&D on CMOS MAPS for the Layer0 of the SuperB SVT 356
Analog front-end for monolithic and hybrid pixels in a vertical integration CMOS technology 355
65 nm CMOS analog front-end for pixel detectors at the HL-LHC 355
Beam test results of different configurations of deep N-well MAPS matrices featuring in pixel full signal processing 354
Beam test performance of prototype silicon detectors for the Outer Tracker for the Phase-2 Upgrade of CMS 354
Dynamic compression of the signal in a charge sensitive amplifier: from concept to design 354
Perspectives for low noise detector readout in a sub-quarter-micron CMOS SOI technology 351
CMOS MAPS in a Homogeneous 3D Process for Charged Particle Tracking 351
Recent progress in the development of 3D deep n-well CMOS MAPS 349
A Rad-Hard Bandgap Voltage Reference for High Energy Physics Experiments 349
An asynchronous front-end channel for pixel detectors at the HL-LHC experiment upgrades 347
Characterization of a large scale DNW MAPS fabricated in a 3D integration process 346
Low-power clock distribution circuits for the Macro Pixel ASIC 344
The associative memory for the self-triggered SLIM5 silicon telescope 342
Modeling charge loss in CMOS MAPS exposed to non-ionizing radiation 339
Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels 339
A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC 335
The first fully functional 3D CMOS chip with Deep N-well active pixel sensors for the ILC vertex detector 326
Dynamic Compression of the Signal in a Charge Sensitive Amplifier: Experimental Results 326
Total ionizing dose effects on CMOS devices in a 110 nm technology 326
Macro Pixel ASIC (MPA): the readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC 325
Experimental study of different silicon sensor options for the upgrade of the CMS Outer Tracker 323
Impact of gate-leakage current noise in sub-100 nm CMOS front-end electronics 322
First measurements of a prototype of a new generation pixel readout ASIC in 65 nm CMOS for extreme rate HEP detectors at HL-LHC 322
Design of low-power, low-voltage, differential I/O links for High Energy Physics applications 320
RD53 analog front-end processors for the ATLAS and CMS experiments at the high-luminosity LHC 315
Advantages of a vertical integration process in the design of DNW MAPS 314
Characterization of bandgap reference circuits designed for high energy physics applications 311
Low-noise fast charge sensitive amplifier with dynamic signal compression 299
Novel active signal compression in low-noise analog readout at future X-ray FEL facilities 298
Design and test of clock distribution circuits for the Macro Pixel ASIC 297
Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC 296
TID effects in deep N-well CMOS monolithic active pixel sensors 291
CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments 290
Deep n-well MAPS in a 130 nm CMOS technology: Beam test results 290
Totale 40.815
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Categoria #
all - tutte 174.069
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 174.069
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20223.028 0 0 0 270 402 579 195 217 247 446 428 244
2022/20233.273 517 384 487 502 275 389 26 132 252 59 147 103
2023/20246.553 92 181 181 137 234 1.351 3.772 241 119 27 39 179
2024/20255.331 248 411 280 751 128 100 88 282 425 1.097 906 615
2025/202610.487 494 557 764 1.144 1.702 731 1.588 553 864 737 559 794
2026/20273.366 309 469 945 1.643 0 0 0 0 0 0 0 0
Totale 56.627