GAIONI, Luigi
 Distribuzione geografica
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Continente #
EU - Europa 28.768
NA - Nord America 11.685
AS - Asia 5.551
SA - Sud America 460
AF - Africa 230
Continente sconosciuto - Info sul continente non disponibili 15
OC - Oceania 11
Totale 46.720
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Nazione #
US - Stati Uniti d'America 11.295
GB - Regno Unito 11.254
IE - Irlanda 5.041
RU - Federazione Russa 3.194
CN - Cina 2.627
PL - Polonia 2.454
IT - Italia 1.987
SG - Singapore 1.873
DE - Germania 1.184
FR - Francia 1.012
NL - Olanda 909
SE - Svezia 816
VN - Vietnam 443
BR - Brasile 366
UA - Ucraina 364
CA - Canada 333
ZA - Sudafrica 191
FI - Finlandia 164
AT - Austria 147
EU - Europa 127
KR - Corea 111
IN - India 98
TR - Turchia 82
ID - Indonesia 56
ES - Italia 50
HK - Hong Kong 49
JP - Giappone 49
BE - Belgio 38
LT - Lituania 38
AR - Argentina 37
BD - Bangladesh 35
MX - Messico 35
CZ - Repubblica Ceca 28
CH - Svizzera 25
IQ - Iraq 18
MY - Malesia 18
BG - Bulgaria 14
CO - Colombia 14
EC - Ecuador 14
RO - Romania 13
PK - Pakistan 11
GR - Grecia 10
IR - Iran 9
TW - Taiwan 9
AU - Australia 8
CL - Cile 8
UZ - Uzbekistan 8
MA - Marocco 7
AE - Emirati Arabi Uniti 6
KE - Kenya 6
PE - Perù 6
PY - Paraguay 6
SA - Arabia Saudita 6
DK - Danimarca 5
LB - Libano 5
LV - Lettonia 5
SC - Seychelles 5
TN - Tunisia 5
VE - Venezuela 5
DO - Repubblica Dominicana 4
IL - Israele 4
JM - Giamaica 4
JO - Giordania 4
AZ - Azerbaigian 3
BH - Bahrain 3
GT - Guatemala 3
MN - Mongolia 3
NP - Nepal 3
PA - Panama 3
PH - Filippine 3
PT - Portogallo 3
TH - Thailandia 3
BY - Bielorussia 2
CR - Costa Rica 2
CY - Cipro 2
EG - Egitto 2
HR - Croazia 2
KG - Kirghizistan 2
LA - Repubblica Popolare Democratica del Laos 2
MD - Moldavia 2
MU - Mauritius 2
MZ - Mozambico 2
NO - Norvegia 2
UY - Uruguay 2
A2 - ???statistics.table.value.countryCode.A2??? 1
AM - Armenia 1
AO - Angola 1
BA - Bosnia-Erzegovina 1
BB - Barbados 1
BJ - Benin 1
BO - Bolivia 1
BW - Botswana 1
CG - Congo 1
GM - Gambi 1
HN - Honduras 1
HT - Haiti 1
HU - Ungheria 1
IS - Islanda 1
KW - Kuwait 1
KZ - Kazakistan 1
Totale 46.816
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Città #
Southend 10.810
Dublin 5.014
Warsaw 2.398
Jacksonville 1.099
Moscow 1.042
Ashburn 914
Singapore 805
Chandler 690
Woodbridge 463
Wilmington 457
Hefei 455
Ann Arbor 447
Princeton 429
Fairfield 406
Nanjing 387
Mountain View 384
Beijing 368
Dearborn 312
Dong Ket 298
Dalmine 285
Toronto 270
Boardman 260
Houston 248
Milan 221
Bergamo 201
Sunnyvale 198
Seattle 194
The Dalles 191
Johannesburg 181
Shanghai 177
Los Angeles 174
Rancio Valcuvia 163
Nanchang 160
Cambridge 158
Atlanta 155
Altamura 143
Andover 140
New York 139
San Mateo 134
Vienna 127
Washington 116
Buffalo 91
London 89
Redwood City 83
Zhengzhou 76
Tianjin 68
Santa Clara 66
Kunming 60
Chicago 57
Ho Chi Minh City 56
Ogden 56
Shenyang 55
Berlin 53
Kiez 50
São Paulo 50
Hebei 49
Munich 49
Pavia 48
Hong Kong 47
Redondo Beach 47
Guangzhou 46
Helsinki 46
Frankfurt am Main 44
Jakarta 44
Fremont 43
Dallas 42
Nürnberg 40
Tokyo 40
Jiaxing 38
Amsterdam 37
Nuremberg 37
Hanoi 36
Brussels 35
Hangzhou 35
Kocaeli 33
Changsha 31
Norwalk 30
Brooklyn 28
Jinan 27
Orem 27
Rome 26
Montreal 25
Needham Heights 25
San Diego 24
Seoul 24
Denver 23
Phoenix 23
Lappeenranta 22
Pisa 21
Verdellino 21
Changchun 20
Hamburg 20
Stockholm 20
Boston 19
Lanzhou 19
Ottawa 18
Saint Petersburg 18
Brno 17
Chennai 17
Poplar 17
Totale 33.521
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Nome #
A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0 811
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC 687
65 nm Technology for HEP: Status and Perspective 656
A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC 608
P-Type Silicon Strip Sensors for the new CMS Tracker at HL-LHC 572
The SuperB Silicon Vertex Tracker 553
A 65 nm CMOS Front-End Chip for High Density Readout of Pixel Sensors 528
Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC 505
3D DNW MAPS for High Resolution, Highly Efficient, Sparse Readout CMOS Detectors 492
A 3D deep n-well CMOS MAPS for the ILC vertex detector 472
Test beam demonstration of silicon microstrip modules with transverse momentum discrimination for the future CMS tracking detector 469
Precision measurement of the structure of the CMS inner tracking system using nuclear interactions 467
Characterisation of irradiated thin silicon sensors for the CMS phase II pixel upgrade 465
2D and 3D CMOS MAPS with high performance pixel-level signal processing 464
Alignment of the CMS tracker with LHC and cosmic ray data 461
Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications 461
Perspectives of 65nm CMOS technologies for high performance front-end electronics 455
Design and test of a 65nm CMOS front-end with zero dead time for next generation pixel detectors 435
Beam test results for the SuperB-SVT thin striplet detector 424
A 65-nm CMOS Prototype Chip With Monolithic Pixel Sensors and Fast Front-End Electronics 420
Vertical integration approach to the readout of pixel detectors for vertexing applications 416
Description and performance of track and primary-vertex reconstruction with the CMS tracker 409
The front-end chip of the SuperB SVT detector 409
The SuperB silicon vertex tracker 402
Vertically integrated deep N-well CMOS MAPS with sparsification and time stamping capabilities for thin charged particle trackers 401
Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker 400
Assessment of a low-power 65 nm CMOS technology for analog front-end design 396
Design of bandgap reference circuits in a 65 nm CMOS technology for HL-LHC applications 389
Comprehensive study of total ionizing dose damage mechanisms and their effects on noise sources in a 90 nm CMOS technology 389
Radiation tolerance of devices and circuits in a 3D technology based on the vertical integration of two 130-nm CMOS layers 387
Mechanisms of Noise Degradation in Low Power 65 nm CMOS Transistors Exposed to Ionizing Radiation 386
Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier 386
2D and 3D thin pixel technologies for the Layer0 of the SuperB Silicon Vertex Tracker 385
Thin pixel development for the superB silicon vertex tracker 367
Fast Analog Front-end for the Readout of the SuperB SVT Inner Layers 365
Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging 363
Noise behavior of a 180 nm CMOS SOI technology for detector front-end electronics 351
The Apsel65 front-end chip for the readout of pixel sensors in the 65 nm CMOS node 350
Investigating degradation mechanisms in 130nm and 90nm commercial CMOS technologies exposed to up to 100 Mrad ionizing radiation dose 349
Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0 340
CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments 340
Review of radiation effects leading to noise performance degradation in 100-nm scale microelectronic technologies 340
Monolithic Pixel Sensors for Fast Particle Trackers in a Quadruple Well CMOS Technology 340
First results from the characterization of a three-dimensional deep N-well MAPS prototype for vertexing applications 338
Development of a multi-lead ECG wearable sensor system for biomedical applications 334
Wearable Sensor System for Multi-lead ECG Measurement 331
Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors 330
Monolithic pixel sensors for fast silicon vertex trackers in a quadruple well CMOS technology 329
MAPS with pixel level sparsified readout: from standard CMOS to vertical integration 328
TID-Induced Degradation in Static and Noise Behavior of Sub-100 nm Multifinger Bulk NMOSFETs 327
R&D Progress on The SuperB Silicon Vertex Tracker 327
Latest results of the R&D on CMOS MAPS for the Layer0 of the SuperB SVT 322
A 4096-pixel MAPS device with on-chip data sparsification 321
Charge Signal Processors in Sparse Readout CMOS MAPS and Hybrid Pixel Sensors for the SuperB Layer0 320
Perspectives for low noise detector readout in a sub-quarter-micron CMOS SOI technology 320
The design of fast analog channels for the readout of strip detectors in the inner layers of the SuperB SVT 320
Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors 319
Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker 319
Beam test performance of prototype silicon detectors for the Outer Tracker for the Phase-2 Upgrade of CMS 319
Analog front-end for monolithic and hybrid pixels in a vertical integration CMOS technology 315
Recent progress in the development of 3D deep n-well CMOS MAPS 314
Active pixel sensors with enhanced pixel-level analog and digital functionalities in a 2-tier 3D CMOS technology 313
Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions 312
Beam test results of different configurations of deep N-well MAPS matrices featuring in pixel full signal processing 311
CMOS MAPS in a Homogeneous 3D Process for Charged Particle Tracking 308
65-nm CMOS Front-End Channel for Pixel Readout in the HL-LHC Radiation Environment 307
65 nm CMOS analog front-end for pixel detectors at the HL-LHC 304
TID effects in deep N-well CMOS monolithic active pixel sensors 303
Low-power clock distribution circuits for the Macro Pixel ASIC 302
Characterization of a large scale DNW MAPS fabricated in a 3D integration process 302
Review of radiation damage studies on DNW CMOS MAPS 300
Instrumentation for gate current noise measurements on sub-100 nm MOS transistors 299
A Front-End Channel in 65 nm CMOS for Pixel Detectors at the HL-LHC Experiment Upgrades 297
An asynchronous front-end channel for pixel detectors at the HL-LHC experiment upgrades 295
The associative memory for the self-triggered SLIM5 silicon telescope 295
Dynamic compression of the signal in a charge sensitive amplifier: from concept to design 294
Impact of gate-leakage current noise in sub-100 nm CMOS front-end electronics 293
The first fully functional 3D CMOS chip with Deep N-well active pixel sensors for the ILC vertex detector 291
Experimental study of different silicon sensor options for the upgrade of the CMS Outer Tracker 290
A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC 289
A 65 nm CMOS analog processor with zero dead time for future pixel detectors 288
Design of low-power, low-voltage, differential I/O links for High Energy Physics applications 288
CMOS MAPS in a homogeneous 3D process for charged particle tracking 287
Modeling charge loss in CMOS MAPS exposed to non-ionizing radiation 287
Total ionizing dose effects on CMOS devices in a 110 nm technology 287
A Rad-Hard Bandgap Voltage Reference for High Energy Physics Experiments 286
Macro Pixel ASIC (MPA): the readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC 281
First measurements of a prototype of a new generation pixel readout ASIC in 65 nm CMOS for extreme rate HEP detectors at HL-LHC 281
Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels 277
Dynamic Compression of the Signal in a Charge Sensitive Amplifier: Experimental Results 276
RD53 analog front-end processors for the ATLAS and CMS experiments at the high-luminosity LHC 268
TID effects in deep N-well CMOS monolithic active pixel sensors 264
Design and test of clock distribution circuits for the Macro Pixel ASIC 263
Low-noise fast charge sensitive amplifier with dynamic signal compression 263
CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments 257
Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC 256
Deep n-well MAPS in a 130 nm CMOS technology: Beam test results 255
Development of deep N-well MAPS in a 130 nm CMOS technology and beam test results on a 4k-Pixel matrix with digital sparsified readout 254
Characterization of bandgap reference circuits designed for high energy physics applications 252
Design of a monolithic active pixel sensor in a two-layer 3D CMOS technology 250
Totale 36.023
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Categoria #
all - tutte 142.195
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 142.195
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20214.317 0 0 0 0 0 574 766 225 664 706 853 529
2021/20224.125 361 497 239 270 402 579 195 217 247 446 428 244
2022/20233.273 517 384 487 502 275 389 26 132 252 59 147 103
2023/20246.553 92 181 181 137 234 1.351 3.772 241 119 27 39 179
2024/20255.331 248 411 280 751 128 100 88 282 425 1.097 906 615
2025/20265.032 494 557 764 1.144 1.702 371 0 0 0 0 0 0
Totale 47.806