GAIONI, Luigi
 Distribuzione geografica
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Continente #
EU - Europa 29.205
NA - Nord America 14.710
AS - Asia 7.263
SA - Sud America 614
AF - Africa 285
Continente sconosciuto - Info sul continente non disponibili 18
OC - Oceania 16
Totale 52.111
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Nazione #
US - Stati Uniti d'America 14.233
GB - Regno Unito 11.297
IE - Irlanda 5.044
RU - Federazione Russa 3.199
CN - Cina 2.917
SG - Singapore 2.500
PL - Polonia 2.462
IT - Italia 2.077
DE - Germania 1.221
FR - Francia 1.184
NL - Olanda 926
SE - Svezia 818
VN - Vietnam 761
BR - Brasile 437
CA - Canada 379
UA - Ucraina 369
ZA - Sudafrica 201
FI - Finlandia 195
IN - India 171
HK - Hong Kong 166
AT - Austria 149
EU - Europa 127
KR - Corea 116
TR - Turchia 108
BD - Bangladesh 84
JP - Giappone 74
ID - Indonesia 71
IQ - Iraq 64
AR - Argentina 62
ES - Italia 53
MX - Messico 49
LT - Lituania 39
BE - Belgio 38
PK - Pakistan 34
CO - Colombia 33
MY - Malesia 31
CZ - Repubblica Ceca 28
CH - Svizzera 25
EC - Ecuador 21
SA - Arabia Saudita 19
VE - Venezuela 19
PH - Filippine 18
RO - Romania 17
BG - Bulgaria 16
CL - Cile 16
TN - Tunisia 16
UZ - Uzbekistan 15
AU - Australia 13
JM - Giamaica 13
MA - Marocco 13
PY - Paraguay 13
LB - Libano 12
TW - Taiwan 12
GR - Grecia 11
JO - Giordania 11
IR - Iran 9
KE - Kenya 9
AE - Emirati Arabi Uniti 8
AZ - Azerbaigian 8
KZ - Kazakistan 8
PE - Perù 8
TH - Thailandia 8
EG - Egitto 7
IL - Israele 7
CR - Costa Rica 6
DK - Danimarca 6
ET - Etiopia 6
HN - Honduras 5
LV - Lettonia 5
NP - Nepal 5
PS - Palestinian Territory 5
SC - Seychelles 5
BH - Bahrain 4
DO - Repubblica Dominicana 4
DZ - Algeria 4
PA - Panama 4
AO - Angola 3
BA - Bosnia-Erzegovina 3
BY - Bielorussia 3
GT - Guatemala 3
HU - Ungheria 3
MN - Mongolia 3
NI - Nicaragua 3
OM - Oman 3
PT - Portogallo 3
SN - Senegal 3
TT - Trinidad e Tobago 3
AL - Albania 2
AM - Armenia 2
BB - Barbados 2
BO - Bolivia 2
CW - ???statistics.table.value.countryCode.CW??? 2
CY - Cipro 2
GA - Gabon 2
HR - Croazia 2
KG - Kirghizistan 2
LA - Repubblica Popolare Democratica del Laos 2
MD - Moldavia 2
MT - Malta 2
MU - Mauritius 2
Totale 52.187
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Città #
Southend 10.810
Dublin 5.017
Warsaw 2.405
Ashburn 1.450
San Jose 1.111
Jacksonville 1.104
Singapore 1.103
Moscow 1.042
Chandler 690
Council Bluffs 501
Woodbridge 463
Wilmington 457
Hefei 456
Ann Arbor 448
Princeton 429
Fairfield 406
Beijing 393
Nanjing 387
Mountain View 384
Dearborn 312
Dong Ket 298
Dalmine 293
Toronto 281
Boardman 261
Houston 252
Milan 229
Los Angeles 217
Bergamo 215
Sunnyvale 198
Seattle 194
The Dalles 191
Shanghai 187
Johannesburg 184
Atlanta 170
Rancio Valcuvia 163
Nanchang 160
Cambridge 158
Lauterbourg 156
Ho Chi Minh City 155
New York 151
Santa Clara 146
Hong Kong 145
Altamura 143
Andover 140
San Mateo 135
Vienna 129
Hanoi 121
Columbus 120
Washington 117
Buffalo 101
London 96
Redwood City 83
Zhengzhou 76
Tianjin 74
Chicago 69
Helsinki 68
Frankfurt am Main 67
Orem 62
Kunming 61
São Paulo 59
Tokyo 57
Dallas 56
Ogden 56
Shenyang 55
Berlin 54
Guangzhou 50
Kiez 50
Hebei 49
Jakarta 49
Munich 49
Pavia 48
Redondo Beach 47
Amsterdam 46
Nuremberg 44
Fremont 43
Montreal 40
Nürnberg 40
Hangzhou 39
Jiaxing 38
Brussels 35
Brooklyn 33
Kocaeli 33
Rome 32
Changsha 31
Lappeenranta 30
Norwalk 30
Seoul 29
Jinan 28
Phoenix 28
Denver 26
Needham Heights 25
San Diego 25
Chennai 23
Pisa 23
Da Nang 22
Istanbul 22
Baghdad 21
Kuala Lumpur 21
Shenzhen 21
Verdellino 21
Totale 36.962
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Nome #
A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0 844
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC 707
65 nm Technology for HEP: Status and Perspective 684
A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC 637
P-Type Silicon Strip Sensors for the new CMS Tracker at HL-LHC 615
The SuperB Silicon Vertex Tracker 584
A 65 nm CMOS Front-End Chip for High Density Readout of Pixel Sensors 563
3D DNW MAPS for High Resolution, Highly Efficient, Sparse Readout CMOS Detectors 540
A 3D deep n-well CMOS MAPS for the ILC vertex detector 522
Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC 522
Test beam demonstration of silicon microstrip modules with transverse momentum discrimination for the future CMS tracking detector 499
2D and 3D CMOS MAPS with high performance pixel-level signal processing 491
Characterisation of irradiated thin silicon sensors for the CMS phase II pixel upgrade 490
Perspectives of 65nm CMOS technologies for high performance front-end electronics 486
Precision measurement of the structure of the CMS inner tracking system using nuclear interactions 485
Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications 482
Alignment of the CMS tracker with LHC and cosmic ray data 475
A 65-nm CMOS Prototype Chip With Monolithic Pixel Sensors and Fast Front-End Electronics 461
Design and test of a 65nm CMOS front-end with zero dead time for next generation pixel detectors 457
Assessment of a low-power 65 nm CMOS technology for analog front-end design 451
Beam test results for the SuperB-SVT thin striplet detector 449
Description and performance of track and primary-vertex reconstruction with the CMS tracker 443
The SuperB silicon vertex tracker 439
Vertically integrated deep N-well CMOS MAPS with sparsification and time stamping capabilities for thin charged particle trackers 439
Vertical integration approach to the readout of pixel detectors for vertexing applications 437
The front-end chip of the SuperB SVT detector 436
Radiation tolerance of devices and circuits in a 3D technology based on the vertical integration of two 130-nm CMOS layers 432
Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier 431
Design of bandgap reference circuits in a 65 nm CMOS technology for HL-LHC applications 430
Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker 426
Comprehensive study of total ionizing dose damage mechanisms and their effects on noise sources in a 90 nm CMOS technology 424
Mechanisms of Noise Degradation in Low Power 65 nm CMOS Transistors Exposed to Ionizing Radiation 414
2D and 3D thin pixel technologies for the Layer0 of the SuperB Silicon Vertex Tracker 406
Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging 406
Fast Analog Front-end for the Readout of the SuperB SVT Inner Layers 405
Thin pixel development for the superB silicon vertex tracker 392
Investigating degradation mechanisms in 130nm and 90nm commercial CMOS technologies exposed to up to 100 Mrad ionizing radiation dose 386
Noise behavior of a 180 nm CMOS SOI technology for detector front-end electronics 376
Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0 372
The Apsel65 front-end chip for the readout of pixel sensors in the 65 nm CMOS node 371
TID-Induced Degradation in Static and Noise Behavior of Sub-100 nm Multifinger Bulk NMOSFETs 366
Review of radiation effects leading to noise performance degradation in 100-nm scale microelectronic technologies 365
First results from the characterization of a three-dimensional deep N-well MAPS prototype for vertexing applications 364
Monolithic Pixel Sensors for Fast Particle Trackers in a Quadruple Well CMOS Technology 361
Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors 358
CMOS technologies in the 100 nm range for rad-hard front-end electronics in future collider experiments 358
The design of fast analog channels for the readout of strip detectors in the inner layers of the SuperB SVT 357
Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions 354
MAPS with pixel level sparsified readout: from standard CMOS to vertical integration 354
Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker 353
A 65 nm CMOS analog processor with zero dead time for future pixel detectors 353
R&D Progress on The SuperB Silicon Vertex Tracker 352
Development of a multi-lead ECG wearable sensor system for biomedical applications 352
65-nm CMOS Front-End Channel for Pixel Readout in the HL-LHC Radiation Environment 352
Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors 351
Monolithic pixel sensors for fast silicon vertex trackers in a quadruple well CMOS technology 350
A Front-End Channel in 65 nm CMOS for Pixel Detectors at the HL-LHC Experiment Upgrades 350
Wearable Sensor System for Multi-lead ECG Measurement 350
Charge Signal Processors in Sparse Readout CMOS MAPS and Hybrid Pixel Sensors for the SuperB Layer0 348
A 4096-pixel MAPS device with on-chip data sparsification 348
Instrumentation for gate current noise measurements on sub-100 nm MOS transistors 342
Latest results of the R&D on CMOS MAPS for the Layer0 of the SuperB SVT 342
Beam test performance of prototype silicon detectors for the Outer Tracker for the Phase-2 Upgrade of CMS 341
TID effects in deep N-well CMOS monolithic active pixel sensors 340
Perspectives for low noise detector readout in a sub-quarter-micron CMOS SOI technology 340
Beam test results of different configurations of deep N-well MAPS matrices featuring in pixel full signal processing 339
Dynamic compression of the signal in a charge sensitive amplifier: from concept to design 338
Analog front-end for monolithic and hybrid pixels in a vertical integration CMOS technology 337
CMOS MAPS in a homogeneous 3D process for charged particle tracking 336
Active pixel sensors with enhanced pixel-level analog and digital functionalities in a 2-tier 3D CMOS technology 336
CMOS MAPS in a Homogeneous 3D Process for Charged Particle Tracking 335
Recent progress in the development of 3D deep n-well CMOS MAPS 333
Review of radiation damage studies on DNW CMOS MAPS 331
An asynchronous front-end channel for pixel detectors at the HL-LHC experiment upgrades 331
Low-power clock distribution circuits for the Macro Pixel ASIC 329
A Rad-Hard Bandgap Voltage Reference for High Energy Physics Experiments 327
65 nm CMOS analog front-end for pixel detectors at the HL-LHC 327
Characterization of a large scale DNW MAPS fabricated in a 3D integration process 325
The associative memory for the self-triggered SLIM5 silicon telescope 325
Modeling charge loss in CMOS MAPS exposed to non-ionizing radiation 321
A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC 316
The first fully functional 3D CMOS chip with Deep N-well active pixel sensors for the ILC vertex detector 312
Total ionizing dose effects on CMOS devices in a 110 nm technology 312
Impact of gate-leakage current noise in sub-100 nm CMOS front-end electronics 310
First measurements of a prototype of a new generation pixel readout ASIC in 65 nm CMOS for extreme rate HEP detectors at HL-LHC 309
Macro Pixel ASIC (MPA): the readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC 305
Dynamic Compression of the Signal in a Charge Sensitive Amplifier: Experimental Results 305
Experimental study of different silicon sensor options for the upgrade of the CMS Outer Tracker 305
Design of low-power, low-voltage, differential I/O links for High Energy Physics applications 303
Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels 302
RD53 analog front-end processors for the ATLAS and CMS experiments at the high-luminosity LHC 300
Characterization of bandgap reference circuits designed for high energy physics applications 298
Advantages of a vertical integration process in the design of DNW MAPS 292
Design and test of clock distribution circuits for the Macro Pixel ASIC 285
Low-noise fast charge sensitive amplifier with dynamic signal compression 285
Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC 283
CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments 277
TID effects in deep N-well CMOS monolithic active pixel sensors 277
Development of a triple well CMOS MAPS device with in-pixel signal processing and sparsified readout capabilities 275
Deep n-well MAPS in a 130 nm CMOS technology: Beam test results 273
Totale 39.004
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Categoria #
all - tutte 158.783
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 158.783
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021529 0 0 0 0 0 0 0 0 0 0 0 529
2021/20224.125 361 497 239 270 402 579 195 217 247 446 428 244
2022/20233.273 517 384 487 502 275 389 26 132 252 59 147 103
2023/20246.553 92 181 181 137 234 1.351 3.772 241 119 27 39 179
2024/20255.331 248 411 280 751 128 100 88 282 425 1.097 906 615
2025/202610.438 494 557 764 1.144 1.702 731 1.588 553 864 737 559 745
Totale 53.212